Added getTargetLowering() to TargetMachine. Refactored targets to support this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26742 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index f6d1be0..8d2805c 100644
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -19,7 +19,7 @@
namespace llvm {
-class TargetMachine;
+class X86TargetMachine;
class PassManager;
class FunctionPass;
class IntrinsicLowering;
@@ -28,7 +28,7 @@
/// createX86ISelDag - This pass converts a legalized DAG into a
/// X86-specific DAG, ready for instruction scheduling.
///
-FunctionPass *createX86ISelDag(TargetMachine &TM);
+FunctionPass *createX86ISelDag(X86TargetMachine &TM);
/// createX86FloatingPointStackifierPass - This function returns a pass which
/// converts floating point register references and pseudo instructions into
@@ -40,7 +40,7 @@
/// assembly code for a MachineFunction to the given output stream,
/// using the given target machine description.
///
-FunctionPass *createX86CodePrinterPass(std::ostream &o, TargetMachine &tm);
+FunctionPass *createX86CodePrinterPass(std::ostream &o, X86TargetMachine &tm);
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
/// to the specified MCE object.
@@ -50,7 +50,7 @@
/// code as an ELF object file.
///
void addX86ELFObjectWriterPass(PassManager &FPM,
- std::ostream &o, TargetMachine &tm);
+ std::ostream &o, X86TargetMachine &tm);
/// createX86EmitCodeToMemory - Returns a pass that converts a register
/// allocated function into raw machine code in a dynamically
diff --git a/lib/Target/X86/X86ATTAsmPrinter.cpp b/lib/Target/X86/X86ATTAsmPrinter.cpp
index f1b53fd..9c5a835 100755
--- a/lib/Target/X86/X86ATTAsmPrinter.cpp
+++ b/lib/Target/X86/X86ATTAsmPrinter.cpp
@@ -21,7 +21,6 @@
#include "llvm/Target/TargetOptions.h"
#include <iostream>
using namespace llvm;
-using namespace x86;
/// runOnMachineFunction - This uses the printMachineInstruction()
/// method to print assembly for each instruction.
diff --git a/lib/Target/X86/X86ATTAsmPrinter.h b/lib/Target/X86/X86ATTAsmPrinter.h
index 325b43d..8d400e8 100755
--- a/lib/Target/X86/X86ATTAsmPrinter.h
+++ b/lib/Target/X86/X86ATTAsmPrinter.h
@@ -18,10 +18,9 @@
#include "llvm/CodeGen/ValueTypes.h"
namespace llvm {
-namespace x86 {
struct X86ATTAsmPrinter : public X86SharedAsmPrinter {
- X86ATTAsmPrinter(std::ostream &O, TargetMachine &TM)
+ X86ATTAsmPrinter(std::ostream &O, X86TargetMachine &TM)
: X86SharedAsmPrinter(O, TM) { }
virtual const char *getPassName() const {
@@ -69,7 +68,6 @@
bool runOnMachineFunction(MachineFunction &F);
};
-} // end namespace x86
} // end namespace llvm
#endif
diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp
index ad2569d..cf2be95 100644
--- a/lib/Target/X86/X86AsmPrinter.cpp
+++ b/lib/Target/X86/X86AsmPrinter.cpp
@@ -14,10 +14,10 @@
//
//===----------------------------------------------------------------------===//
+#include "X86AsmPrinter.h"
#include "X86ATTAsmPrinter.h"
#include "X86IntelAsmPrinter.h"
#include "X86Subtarget.h"
-#include "X86.h"
#include "llvm/Constants.h"
#include "llvm/Module.h"
#include "llvm/Type.h"
@@ -25,10 +25,9 @@
#include "llvm/Support/Mangler.h"
#include "llvm/Support/CommandLine.h"
using namespace llvm;
-using namespace x86;
-Statistic<> llvm::x86::EmittedInsts("asm-printer",
- "Number of machine instrs printed");
+Statistic<> llvm::EmittedInsts("asm-printer",
+ "Number of machine instrs printed");
enum AsmWriterFlavorTy { att, intel };
cl::opt<AsmWriterFlavorTy>
@@ -210,7 +209,8 @@
/// for a MachineFunction to the given output stream, using the given target
/// machine description.
///
-FunctionPass *llvm::createX86CodePrinterPass(std::ostream &o,TargetMachine &tm){
+FunctionPass *llvm::createX86CodePrinterPass(std::ostream &o,
+ X86TargetMachine &tm){
switch (AsmWriterFlavor) {
default:
assert(0 && "Unknown asm flavor!");
diff --git a/lib/Target/X86/X86AsmPrinter.h b/lib/Target/X86/X86AsmPrinter.h
index ed0fdbe..c4d67b6 100755
--- a/lib/Target/X86/X86AsmPrinter.h
+++ b/lib/Target/X86/X86AsmPrinter.h
@@ -17,6 +17,7 @@
#define X86ASMPRINTER_H
#include "X86.h"
+#include "X86TargetMachine.h"
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/DwarfWriter.h"
#include "llvm/CodeGen/MachineDebugInfo.h"
@@ -25,7 +26,6 @@
namespace llvm {
-namespace x86 {
extern Statistic<> EmittedInsts;
@@ -56,7 +56,7 @@
struct X86SharedAsmPrinter : public AsmPrinter {
X86DwarfWriter DW;
- X86SharedAsmPrinter(std::ostream &O, TargetMachine &TM)
+ X86SharedAsmPrinter(std::ostream &O, X86TargetMachine &TM)
: AsmPrinter(O, TM), DW(O, this), forDarwin(false) { }
bool doInitialization(Module &M);
@@ -90,7 +90,6 @@
}
};
-} // end namespace x86
} // end namespace llvm
#endif
diff --git a/lib/Target/X86/X86ELFWriter.cpp b/lib/Target/X86/X86ELFWriter.cpp
index 8a6f1fc..a449ce2 100644
--- a/lib/Target/X86/X86ELFWriter.cpp
+++ b/lib/Target/X86/X86ELFWriter.cpp
@@ -13,15 +13,15 @@
//===----------------------------------------------------------------------===//
#include "X86.h"
+#include "X86TargetMachine.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/ELFWriter.h"
-#include "llvm/Target/TargetMachine.h"
using namespace llvm;
namespace {
class X86ELFWriter : public ELFWriter {
public:
- X86ELFWriter(std::ostream &O, TargetMachine &TM) : ELFWriter(O, TM) {
+ X86ELFWriter(std::ostream &O, X86TargetMachine &TM) : ELFWriter(O, TM) {
e_machine = 3; // EM_386
}
};
@@ -31,7 +31,7 @@
/// as an ELF object file.
///
void llvm::addX86ELFObjectWriterPass(PassManager &FPM,
- std::ostream &O, TargetMachine &TM) {
+ std::ostream &O, X86TargetMachine &TM) {
X86ELFWriter *EW = new X86ELFWriter(O, TM);
FPM.add(EW);
FPM.add(createX86CodeEmitterPass(EW->getMachineCodeEmitter()));
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 3cf3671..5d096ef 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -15,9 +15,10 @@
#define DEBUG_TYPE "isel"
#include "X86.h"
#include "X86InstrBuilder.h"
+#include "X86ISelLowering.h"
#include "X86RegisterInfo.h"
#include "X86Subtarget.h"
-#include "X86ISelLowering.h"
+#include "X86TargetMachine.h"
#include "llvm/GlobalValue.h"
#include "llvm/Instructions.h"
#include "llvm/Support/CFG.h"
@@ -90,8 +91,9 @@
unsigned GlobalBaseReg;
public:
- X86DAGToDAGISel(TargetMachine &TM)
- : SelectionDAGISel(X86Lowering), X86Lowering(TM) {
+ X86DAGToDAGISel(X86TargetMachine &TM)
+ : SelectionDAGISel(X86Lowering),
+ X86Lowering(*TM.getTargetLowering()) {
Subtarget = &TM.getSubtarget<X86Subtarget>();
}
@@ -842,6 +844,6 @@
/// createX86ISelDag - This pass converts a legalized DAG into a
/// X86-specific DAG, ready for instruction scheduling.
///
-FunctionPass *llvm::createX86ISelDag(TargetMachine &TM) {
+FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM) {
return new X86DAGToDAGISel(TM);
}
diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index 414a070..823fa6a 100644
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -230,6 +230,12 @@
std::vector<unsigned>
getRegClassForInlineAsmConstraint(const std::string &Constraint,
MVT::ValueType VT) const;
+
+ /// isLegalAddressImmediate - Return true if the integer value or
+ /// GlobalValue can be used as the offset of the target addressing mode.
+ virtual bool isLegalAddressImmediate(int64_t V) const;
+ virtual bool isLegalAddressImmediate(GlobalValue *GV) const;
+
private:
// C Calling Convention implementation.
std::vector<SDOperand> LowerCCCArguments(Function &F, SelectionDAG &DAG);
diff --git a/lib/Target/X86/X86IntelAsmPrinter.cpp b/lib/Target/X86/X86IntelAsmPrinter.cpp
index a04dfca..2980bfe 100755
--- a/lib/Target/X86/X86IntelAsmPrinter.cpp
+++ b/lib/Target/X86/X86IntelAsmPrinter.cpp
@@ -20,7 +20,6 @@
#include "llvm/Support/Mangler.h"
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
-using namespace x86;
/// runOnMachineFunction - This uses the printMachineInstruction()
/// method to print assembly for each instruction.
diff --git a/lib/Target/X86/X86IntelAsmPrinter.h b/lib/Target/X86/X86IntelAsmPrinter.h
index cf8d3cf..13d0ad6 100755
--- a/lib/Target/X86/X86IntelAsmPrinter.h
+++ b/lib/Target/X86/X86IntelAsmPrinter.h
@@ -16,14 +16,12 @@
#include "X86AsmPrinter.h"
#include "llvm/CodeGen/ValueTypes.h"
-#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/MRegisterInfo.h"
namespace llvm {
-namespace x86 {
struct X86IntelAsmPrinter : public X86SharedAsmPrinter {
- X86IntelAsmPrinter(std::ostream &O, TargetMachine &TM)
+ X86IntelAsmPrinter(std::ostream &O, X86TargetMachine &TM)
: X86SharedAsmPrinter(O, TM) { }
virtual const char *getPassName() const {
@@ -91,7 +89,6 @@
bool doInitialization(Module &M);
};
-} // end namespace x86
} // end namespace llvm
#endif
diff --git a/lib/Target/X86/X86JITInfo.h b/lib/Target/X86/X86JITInfo.h
index b240674..02e54af 100644
--- a/lib/Target/X86/X86JITInfo.h
+++ b/lib/Target/X86/X86JITInfo.h
@@ -17,13 +17,13 @@
#include "llvm/Target/TargetJITInfo.h"
namespace llvm {
- class TargetMachine;
+ class X86TargetMachine;
class IntrinsicLowering;
class X86JITInfo : public TargetJITInfo {
- TargetMachine &TM;
+ X86TargetMachine &TM;
public:
- X86JITInfo(TargetMachine &tm) : TM(tm) {useGOT = 0;}
+ X86JITInfo(X86TargetMachine &tm) : TM(tm) {useGOT = 0;}
/// addPassesToJITCompile - Add passes to the specified pass manager to
/// implement a fast dynamic compiler for this target. Return true if this
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index de7004d..2de8cc0 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -79,7 +79,7 @@
Subtarget(M, FS),
FrameInfo(TargetFrameInfo::StackGrowsDown,
Subtarget.getStackAlignment(), -4),
- JITInfo(*this) {
+ JITInfo(*this), TLInfo(*this) {
if (getRelocationModel() == Reloc::Default)
if (Subtarget.isTargetDarwin())
setRelocationModel(Reloc::DynamicNoPIC);
@@ -97,7 +97,7 @@
FileType != TargetMachine::ObjectFile) return true;
// Run loop strength reduction before anything else.
- if (EnableX86LSR) PM.add(createLoopStrengthReducePass());
+ if (EnableX86LSR) PM.add(createLoopStrengthReducePass(1, &TLInfo));
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
@@ -164,6 +164,10 @@
// The JIT should use static relocation model.
TM.setRelocationModel(Reloc::Static);
+ // Run loop strength reduction before anything else.
+ if (EnableX86LSR)
+ PM.add(createLoopStrengthReducePass(1, TM.getTargetLowering()));
+
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h
index 10f012a..f63fc34 100644
--- a/lib/Target/X86/X86TargetMachine.h
+++ b/lib/Target/X86/X86TargetMachine.h
@@ -17,18 +17,21 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/PassManager.h"
+#include "X86.h"
#include "X86InstrInfo.h"
#include "X86JITInfo.h"
#include "X86Subtarget.h"
+#include "X86ISelLowering.h"
namespace llvm {
class IntrinsicLowering;
class X86TargetMachine : public TargetMachine {
- X86InstrInfo InstrInfo;
- X86Subtarget Subtarget;
- TargetFrameInfo FrameInfo;
- X86JITInfo JITInfo;
+ X86InstrInfo InstrInfo;
+ X86Subtarget Subtarget;
+ TargetFrameInfo FrameInfo;
+ X86JITInfo JITInfo;
+ X86TargetLowering TLInfo;
public:
X86TargetMachine(const Module &M, IntrinsicLowering *IL,
const std::string &FS);
@@ -37,6 +40,7 @@
virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
virtual TargetJITInfo *getJITInfo() { return &JITInfo; }
virtual const TargetSubtarget *getSubtargetImpl() const{ return &Subtarget; }
+ virtual X86TargetLowering *getTargetLowering() { return &TLInfo; }
virtual const MRegisterInfo *getRegisterInfo() const {
return &InstrInfo.getRegisterInfo();
}