r70270 isn't ready yet. Back this out. Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h b/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
index 7cf9c72..30630e9 100644
--- a/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
+++ b/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
@@ -33,9 +33,9 @@
MachineModuleInfo *MMI;
const X86Subtarget *Subtarget;
public:
- explicit X86ATTAsmPrinter(raw_ostream &O, X86TargetMachine &TM,
- const TargetAsmInfo *T, unsigned OL, bool V)
- : AsmPrinter(O, TM, T, OL, V), DW(0), MMI(0) {
+ X86ATTAsmPrinter(raw_ostream &O, X86TargetMachine &TM,
+ const TargetAsmInfo *T, bool F, bool V)
+ : AsmPrinter(O, TM, T, F, V), DW(0), MMI(0) {
Subtarget = &TM.getSubtarget<X86Subtarget>();
}
diff --git a/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp b/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
index 85c5471..d64aaa6 100644
--- a/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
+++ b/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
@@ -25,15 +25,13 @@
///
FunctionPass *llvm::createX86CodePrinterPass(raw_ostream &o,
X86TargetMachine &tm,
- unsigned OptLevel, bool verbose) {
+ bool fast, bool verbose) {
const X86Subtarget *Subtarget = &tm.getSubtarget<X86Subtarget>();
if (Subtarget->isFlavorIntel()) {
- return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(),
- OptLevel, verbose);
+ return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
} else {
- return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(),
- OptLevel, verbose);
+ return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
}
diff --git a/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h b/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
index 054cd9c..489d946 100644
--- a/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
+++ b/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
@@ -25,9 +25,9 @@
namespace llvm {
struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter {
- explicit X86IntelAsmPrinter(raw_ostream &O, X86TargetMachine &TM,
- const TargetAsmInfo *T, unsigned OL, bool V)
- : AsmPrinter(O, TM, T, OL, V) {}
+ X86IntelAsmPrinter(raw_ostream &O, X86TargetMachine &TM,
+ const TargetAsmInfo *T, bool F, bool V)
+ : AsmPrinter(O, TM, T, F, V) {}
virtual const char *getPassName() const {
return "X86 Intel-Style Assembly Printer";
diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index 9dad017..72ff02b 100644
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -25,7 +25,7 @@
/// createX86ISelDag - This pass converts a legalized DAG into a
/// X86-specific DAG, ready for instruction scheduling.
///
-FunctionPass *createX86ISelDag(X86TargetMachine &TM, unsigned OptSize);
+FunctionPass *createX86ISelDag(X86TargetMachine &TM, bool Fast);
/// createX86FloatingPointStackifierPass - This function returns a pass which
/// converts floating point register references and pseudo instructions into
@@ -44,7 +44,7 @@
///
FunctionPass *createX86CodePrinterPass(raw_ostream &o,
X86TargetMachine &tm,
- unsigned OptLevel, bool Verbose);
+ bool fast, bool Verbose);
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
/// to the specified MCE object.
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 7da43e9..4b698ce 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -134,8 +134,8 @@
bool OptForSize;
public:
- explicit X86DAGToDAGISel(X86TargetMachine &tm, unsigned OptLevel)
- : SelectionDAGISel(tm, OptLevel),
+ X86DAGToDAGISel(X86TargetMachine &tm, bool fast)
+ : SelectionDAGISel(tm, fast),
TM(tm), X86Lowering(*TM.getTargetLowering()),
Subtarget(&TM.getSubtarget<X86Subtarget>()),
OptForSize(false) {}
@@ -306,7 +306,7 @@
bool X86DAGToDAGISel::IsLegalAndProfitableToFold(SDNode *N, SDNode *U,
SDNode *Root) const {
- if (OptLevel == 0) return false;
+ if (Fast) return false;
if (U == Root)
switch (U->getOpcode()) {
@@ -512,7 +512,7 @@
/// PreprocessForRMW - Preprocess the DAG to make instruction selection better.
-/// This is only run if not in -O0 mode.
+/// This is only run if not in -fast mode (aka -O0).
/// This allows the instruction selector to pick more read-modify-write
/// instructions. This is a common case:
///
@@ -714,10 +714,10 @@
OptForSize = F->hasFnAttr(Attribute::OptimizeForSize);
DEBUG(BB->dump());
- if (OptLevel != 0)
+ if (!Fast)
PreprocessForRMW();
- // FIXME: This should only happen when not compiled with -O0.
+ // FIXME: This should only happen when not -fast.
PreprocessForFPConvert();
// Codegen the basic block.
@@ -1744,6 +1744,6 @@
/// createX86ISelDag - This pass converts a legalized DAG into a
/// X86-specific DAG, ready for instruction scheduling.
///
-FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM, unsigned OptLevel) {
- return new X86DAGToDAGISel(TM, OptLevel);
+FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM, bool Fast) {
+ return new X86DAGToDAGISel(TM, Fast);
}
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index df086e8..a20e1c4 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -180,9 +180,9 @@
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
-bool X86TargetMachine::addInstSelector(PassManagerBase &PM, unsigned OptLevel) {
+bool X86TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
// Install an instruction selector.
- PM.add(createX86ISelDag(*this, OptLevel));
+ PM.add(createX86ISelDag(*this, Fast));
// If we're using Fast-ISel, clean up the mess.
if (EnableFastISel)
@@ -194,29 +194,27 @@
return false;
}
-bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM, unsigned OptLevel) {
+bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM, bool Fast) {
// Calculate and set max stack object alignment early, so we can decide
// whether we will need stack realignment (and thus FP).
PM.add(createX86MaxStackAlignmentCalculatorPass());
return false; // -print-machineinstr shouldn't print after this.
}
-bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, unsigned OptLevel) {
+bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, bool Fast) {
PM.add(createX86FloatingPointStackifierPass());
return true; // -print-machineinstr should print after this.
}
-bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM,
- unsigned OptLevel,
- bool Verbose,
- raw_ostream &Out) {
+bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
+ bool Verbose, raw_ostream &Out) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose));
+ PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose));
return false;
}
-bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
+bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) {
// FIXME: Move this to TargetJITInfo!
// On Darwin, do not override 64-bit setting made in X86TargetMachine().
@@ -238,20 +236,19 @@
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
+ PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;
}
-bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
- unsigned OptLevel, bool DumpAsm,
- MachineCodeEmitter &MCE) {
+bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
+ bool DumpAsm, MachineCodeEmitter &MCE) {
PM.add(createX86CodeEmitterPass(*this, MCE));
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
+ PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;
diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h
index 4b4e26f..fdc00fa 100644
--- a/lib/Target/X86/X86TargetMachine.h
+++ b/lib/Target/X86/X86TargetMachine.h
@@ -45,7 +45,7 @@
// set this functions to ctor pointer at startup time if they are linked in.
typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
X86TargetMachine &tm,
- unsigned OptLevel, bool verbose);
+ bool fast, bool verbose);
static AsmPrinterCtorFn AsmPrinterCtor;
public:
@@ -74,14 +74,14 @@
}
// Set up the pass pipeline.
- virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel);
- virtual bool addPreRegAlloc(PassManagerBase &PM, unsigned OptLevel);
- virtual bool addPostRegAlloc(PassManagerBase &PM, unsigned OptLevel);
- virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel,
+ virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
+ virtual bool addPreRegAlloc(PassManagerBase &PM, bool Fast);
+ virtual bool addPostRegAlloc(PassManagerBase &PM, bool Fast);
+ virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
bool Verbose, raw_ostream &Out);
- virtual bool addCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
+ virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
- virtual bool addSimpleCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
+ virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
/// symbolicAddressesAreRIPRel - Return true if symbolic addresses are