Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182680 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 3e8b882..b707145 100644
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -332,17 +332,17 @@
bool PPCDAGToDAGISel::isRunOfOnes(unsigned Val, unsigned &MB, unsigned &ME) {
if (isShiftedMask_32(Val)) {
// look for the first non-zero bit
- MB = CountLeadingZeros_32(Val);
+ MB = countLeadingZeros(Val);
// look for the first zero bit after the run of ones
- ME = CountLeadingZeros_32((Val - 1) ^ Val);
+ ME = countLeadingZeros((Val - 1) ^ Val);
return true;
} else {
Val = ~Val; // invert mask
if (isShiftedMask_32(Val)) {
// effectively look for the first zero bit
- ME = CountLeadingZeros_32(Val) - 1;
+ ME = countLeadingZeros(Val) - 1;
// effectively look for the first one bit after the run of zeros
- MB = CountLeadingZeros_32((Val - 1) ^ Val) + 1;
+ MB = countLeadingZeros((Val - 1) ^ Val) + 1;
return true;
}
}
@@ -912,7 +912,7 @@
// If it can't be represented as a 32 bit value.
if (!isInt<32>(Imm)) {
- Shift = CountTrailingZeros_64(Imm);
+ Shift = countTrailingZeros<uint64_t>(Imm);
int64_t ImmSh = static_cast<uint64_t>(Imm) >> Shift;
// If the shifted value fits 32 bits.