Create a new class, MemOperand, for describing memory references
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46585 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 757b3bd..8aa854d 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -15,6 +15,8 @@
#include "llvm/Value.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/PseudoSourceValue.h"
+#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetInstrDesc.h"
#include "llvm/Target/MRegisterInfo.h"
@@ -291,6 +293,7 @@
TID = &MI.getDesc();
NumImplicitOps = MI.NumImplicitOps;
Operands.reserve(MI.getNumOperands());
+ MemOperands = MI.MemOperands;
// Add operands
for (unsigned i = 0; i != MI.getNumOperands(); ++i) {
@@ -620,6 +623,34 @@
getOperand(i).print(OS, TM);
}
+ if (getNumMemOperands() > 0) {
+ OS << ", SV:";
+ for (unsigned i = 0; i < getNumMemOperands(); i++) {
+ const MemOperand &MRO = getMemOperand(i);
+ const Value *V = MRO.getValue();
+
+ assert(V && "SV missing.");
+ assert((MRO.isLoad() || MRO.isStore()) &&
+ "SV has to be a load, store or both.");
+
+ if (MRO.isVolatile())
+ OS << "Volatile";
+ if (MRO.isLoad())
+ OS << "LD";
+ if (MRO.isStore())
+ OS << "ST";
+
+ OS << MRO.getSize();
+
+ if (!V->getName().empty())
+ OS << "[" << V->getName() << " + " << MRO.getOffset() << "]";
+ else if (isa<PseudoSourceValue>(V))
+ OS << "[" << *V << " + " << MRO.getOffset() << "]";
+ else
+ OS << "[" << V << " + " << MRO.getOffset() << "]";
+ }
+ }
+
OS << "\n";
}
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index ee2e49c..a8e9c22 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -16,6 +16,7 @@
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetData.h"
@@ -509,9 +510,10 @@
SDOperand CPIdx = DAG.getConstantPool(LLVMC, TLI.getPointerTy());
if (Extend) {
return DAG.getExtLoad(ISD::EXTLOAD, MVT::f64, DAG.getEntryNode(),
- CPIdx, NULL, 0, MVT::f32);
+ CPIdx, &PseudoSourceValue::CPRel, 0, MVT::f32);
} else {
- return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0);
+ return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
+ &PseudoSourceValue::CPRel, 0);
}
}
@@ -796,6 +798,7 @@
case ISD::TargetExternalSymbol:
case ISD::VALUETYPE:
case ISD::SRCVALUE:
+ case ISD::MEMOPERAND:
case ISD::STRING:
case ISD::CONDCODE:
// Primitives must all be legal.
@@ -1301,8 +1304,14 @@
MVT::ValueType IdxVT = Tmp3.getValueType();
MVT::ValueType PtrVT = TLI.getPointerTy();
SDOperand StackPtr = DAG.CreateStackTemporary(VT);
+
+ FrameIndexSDNode *StackPtrFI = dyn_cast<FrameIndexSDNode>(StackPtr.Val);
+ assert(StackPtrFI);
+ int SPFI = StackPtrFI->getIndex();
+
// Store the vector.
- SDOperand Ch = DAG.getStore(DAG.getEntryNode(), Tmp1, StackPtr, NULL, 0);
+ SDOperand Ch = DAG.getStore(DAG.getEntryNode(), Tmp1, StackPtr,
+ &PseudoSourceValue::FPRel, SPFI);
// Truncate or zero extend offset to target pointer type.
unsigned CastOpc = (IdxVT > PtrVT) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
@@ -1312,9 +1321,9 @@
Tmp3 = DAG.getNode(ISD::MUL, IdxVT, Tmp3,DAG.getConstant(EltSize, IdxVT));
SDOperand StackPtr2 = DAG.getNode(ISD::ADD, IdxVT, Tmp3, StackPtr);
// Store the scalar value.
- Ch = DAG.getStore(Ch, Tmp2, StackPtr2, NULL, 0);
+ Ch = DAG.getStore(Ch, Tmp2, StackPtr2, &PseudoSourceValue::FPRel, SPFI);
// Load the updated vector.
- Result = DAG.getLoad(VT, Ch, StackPtr, NULL, 0);
+ Result = DAG.getLoad(VT, Ch, StackPtr, &PseudoSourceValue::FPRel, SPFI);
break;
}
}
@@ -1663,8 +1672,10 @@
SDOperand LD;
switch (EntrySize) {
default: assert(0 && "Size of jump table not supported yet."); break;
- case 4: LD = DAG.getLoad(MVT::i32, Chain, Addr, NULL, 0); break;
- case 8: LD = DAG.getLoad(MVT::i64, Chain, Addr, NULL, 0); break;
+ case 4: LD = DAG.getLoad(MVT::i32, Chain, Addr,
+ &PseudoSourceValue::JTRel, 0); break;
+ case 8: LD = DAG.getLoad(MVT::i64, Chain, Addr,
+ &PseudoSourceValue::JTRel, 0); break;
}
Addr = LD;
@@ -3225,16 +3236,14 @@
}
break;
case TargetLowering::Expand: {
- SrcValueSDNode *SV = cast<SrcValueSDNode>(Node->getOperand(2));
- SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2,
- SV->getValue(), SV->getOffset());
+ const Value *V = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
+ SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2, V, 0);
// Increment the pointer, VAList, to the next vaarg
Tmp3 = DAG.getNode(ISD::ADD, TLI.getPointerTy(), VAList,
DAG.getConstant(MVT::getSizeInBits(VT)/8,
TLI.getPointerTy()));
// Store the incremented VAList to the legalized pointer
- Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, SV->getValue(),
- SV->getOffset());
+ Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, V, 0);
// Load the actual argument out of the pointer VAList
Result = DAG.getLoad(VT, Tmp3, VAList, NULL, 0);
Tmp1 = LegalizeOp(Result.getValue(1));
@@ -3270,12 +3279,10 @@
case TargetLowering::Expand:
// This defaults to loading a pointer from the input and storing it to the
// output, returning the chain.
- SrcValueSDNode *SVD = cast<SrcValueSDNode>(Node->getOperand(3));
- SrcValueSDNode *SVS = cast<SrcValueSDNode>(Node->getOperand(4));
- Tmp4 = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp3, SVD->getValue(),
- SVD->getOffset());
- Result = DAG.getStore(Tmp4.getValue(1), Tmp4, Tmp2, SVS->getValue(),
- SVS->getOffset());
+ const Value *VD = cast<SrcValueSDNode>(Node->getOperand(3))->getValue();
+ const Value *VS = cast<SrcValueSDNode>(Node->getOperand(4))->getValue();
+ Tmp4 = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp3, VD, 0);
+ Result = DAG.getStore(Tmp4.getValue(1), Tmp4, Tmp2, VS, 0);
break;
}
break;
@@ -4270,16 +4277,14 @@
Tmp3 = DAG.getVAArg(VT, Tmp1, Tmp2, Node->getOperand(2));
Result = TLI.CustomPromoteOperation(Tmp3, DAG);
} else {
- SrcValueSDNode *SV = cast<SrcValueSDNode>(Node->getOperand(2));
- SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2,
- SV->getValue(), SV->getOffset());
+ const Value *V = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
+ SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2, V, 0);
// Increment the pointer, VAList, to the next vaarg
Tmp3 = DAG.getNode(ISD::ADD, TLI.getPointerTy(), VAList,
DAG.getConstant(MVT::getSizeInBits(VT)/8,
TLI.getPointerTy()));
// Store the incremented VAList to the legalized pointer
- Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, SV->getValue(),
- SV->getOffset());
+ Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, V, 0);
// Load the actual argument out of the pointer VAList
Result = DAG.getExtLoad(ISD::EXTLOAD, NVT, Tmp3, VAList, NULL, 0, VT);
}
@@ -4735,6 +4740,10 @@
// Create the stack frame object.
SDOperand FIPtr = DAG.CreateStackTemporary(SlotVT);
+ FrameIndexSDNode *StackPtrFI = dyn_cast<FrameIndexSDNode>(FIPtr);
+ assert(StackPtrFI);
+ int SPFI = StackPtrFI->getIndex();
+
unsigned SrcSize = MVT::getSizeInBits(SrcOp.getValueType());
unsigned SlotSize = MVT::getSizeInBits(SlotVT);
unsigned DestSize = MVT::getSizeInBits(DestVT);
@@ -4743,10 +4752,12 @@
// later than DestVT.
SDOperand Store;
if (SrcSize > SlotSize)
- Store = DAG.getTruncStore(DAG.getEntryNode(), SrcOp, FIPtr, NULL, 0,SlotVT);
+ Store = DAG.getTruncStore(DAG.getEntryNode(), SrcOp, FIPtr,
+ &PseudoSourceValue::FPRel, SPFI, SlotVT);
else {
assert(SrcSize == SlotSize && "Invalid store");
- Store = DAG.getStore(DAG.getEntryNode(), SrcOp, FIPtr, NULL, 0);
+ Store = DAG.getStore(DAG.getEntryNode(), SrcOp, FIPtr,
+ &PseudoSourceValue::FPRel, SPFI, SlotVT);
}
// Result is a load from the stack slot.
@@ -4761,9 +4772,15 @@
// Create a vector sized/aligned stack slot, store the value to element #0,
// then load the whole vector back out.
SDOperand StackPtr = DAG.CreateStackTemporary(Node->getValueType(0));
+
+ FrameIndexSDNode *StackPtrFI = dyn_cast<FrameIndexSDNode>(StackPtr);
+ assert(StackPtrFI);
+ int SPFI = StackPtrFI->getIndex();
+
SDOperand Ch = DAG.getStore(DAG.getEntryNode(), Node->getOperand(0), StackPtr,
- NULL, 0);
- return DAG.getLoad(Node->getValueType(0), Ch, StackPtr, NULL, 0);
+ &PseudoSourceValue::FPRel, SPFI);
+ return DAG.getLoad(Node->getValueType(0), Ch, StackPtr,
+ &PseudoSourceValue::FPRel, SPFI);
}
@@ -4827,7 +4844,8 @@
}
Constant *CP = ConstantVector::get(CV);
SDOperand CPIdx = DAG.getConstantPool(CP, TLI.getPointerTy());
- return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0);
+ return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
+ &PseudoSourceValue::CPRel, 0);
}
if (SplatValue.Val) { // Splat of one value?
@@ -5169,11 +5187,13 @@
CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
SDOperand FudgeInReg;
if (DestTy == MVT::f32)
- FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx, NULL, 0);
+ FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
+ &PseudoSourceValue::CPRel, 0);
else if (MVT::getSizeInBits(DestTy) > MVT::getSizeInBits(MVT::f32))
// FIXME: Avoid the extend by construction the right constantpool?
FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, DestTy, DAG.getEntryNode(),
- CPIdx, NULL, 0, MVT::f32);
+ CPIdx, &PseudoSourceValue::CPRel, 0,
+ MVT::f32);
else
assert(0 && "Unexpected conversion");
@@ -5315,11 +5335,13 @@
CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
SDOperand FudgeInReg;
if (DestVT == MVT::f32)
- FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx, NULL, 0);
+ FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
+ &PseudoSourceValue::CPRel, 0);
else {
FudgeInReg = LegalizeOp(DAG.getExtLoad(ISD::EXTLOAD, DestVT,
DAG.getEntryNode(), CPIdx,
- NULL, 0, MVT::f32));
+ &PseudoSourceValue::CPRel, 0,
+ MVT::f32));
}
return DAG.getNode(ISD::FADD, DestVT, Tmp1, FudgeInReg);
@@ -6728,10 +6750,14 @@
// Lower to a store/load so that it can be split.
// FIXME: this could be improved probably.
SDOperand Ptr = DAG.CreateStackTemporary(InOp.getValueType());
+ FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr.Val);
+ assert(FI && "Expecting CreateStackTemporary to return a frame index.\n");
SDOperand St = DAG.getStore(DAG.getEntryNode(),
- InOp, Ptr, NULL, 0);
- InOp = DAG.getLoad(Op.getValueType(), St, Ptr, NULL, 0);
+ InOp, Ptr,
+ &PseudoSourceValue::FPRel, FI->getIndex());
+ InOp = DAG.getLoad(Op.getValueType(), St, Ptr,
+ &PseudoSourceValue::FPRel, FI->getIndex());
}
// Split the vector and convert each of the pieces now.
SplitVectorOp(InOp, Lo, Hi);
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 84cd048..37beff9 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -277,15 +277,27 @@
return N;
}
-/// CountOperands The inputs to target nodes have any actual inputs first,
-/// followed by an optional chain operand, then flag operands. Compute the
-/// number of actual operands that will go into the machine instr.
+/// CountOperands - The inputs to target nodes have any actual inputs first,
+/// followed by optional memory operands chain operand, then flag operands.
+/// Compute the number of actual operands that will go into the machine istr.
unsigned ScheduleDAG::CountOperands(SDNode *Node) {
unsigned N = Node->getNumOperands();
while (N && Node->getOperand(N - 1).getValueType() == MVT::Flag)
--N;
if (N && Node->getOperand(N - 1).getValueType() == MVT::Other)
--N; // Ignore chain if it exists.
+ while (N && MemOperandSDNode::classof(Node->getOperand(N - 1).Val))
+ --N; // Ignore MemOperand nodes
+ return N;
+}
+
+/// CountMemOperands - Find the index of the last MemOperandSDNode operand
+unsigned ScheduleDAG::CountMemOperands(SDNode *Node) {
+ unsigned N = Node->getNumOperands();
+ while (N && Node->getOperand(N - 1).getValueType() == MVT::Flag)
+ --N;
+ if (N && Node->getOperand(N - 1).getValueType() == MVT::Other)
+ --N; // Ignore chain if it exists.
return N;
}
@@ -517,6 +529,10 @@
}
+void ScheduleDAG::AddMemOperand(MachineInstr *MI, const MemOperand &MO) {
+ MI->addMemOperand(MO);
+}
+
// Returns the Register Class of a subregister
static const TargetRegisterClass *getSubRegisterRegClass(
const TargetRegisterClass *TRC,
@@ -674,6 +690,7 @@
unsigned NumResults = CountResults(Node);
unsigned NodeOperands = CountOperands(Node);
+ unsigned NodeMemOperands = CountMemOperands(Node);
unsigned NumMIOperands = NodeOperands + NumResults;
bool HasPhysRegOuts = (NumResults > II.getNumDefs()) &&
II.getImplicitDefs() != 0;
@@ -696,6 +713,10 @@
for (unsigned i = 0; i != NodeOperands; ++i)
AddOperand(MI, Node->getOperand(i), i+II.getNumDefs(), &II, VRBaseMap);
+ // Emit all of the memory operands of this instruction
+ for (unsigned i = NodeOperands; i != NodeMemOperands; ++i)
+ AddMemOperand(MI, cast<MemOperandSDNode>(Node->getOperand(i))->MO);
+
// Commute node if it has been determined to be profitable.
if (CommuteSet.count(Node)) {
MachineInstr *NewMI = TII->commuteInstruction(MI);
@@ -754,6 +775,7 @@
case ISD::EntryToken: // fall thru
case ISD::TokenFactor:
case ISD::LABEL:
+ case ISD::SRCVALUE:
break;
case ISD::CopyToReg: {
unsigned InReg;
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 8ce826d..d38dc1a 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -20,6 +20,7 @@
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetData.h"
@@ -342,10 +343,16 @@
case ISD::Register:
ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
break;
- case ISD::SRCVALUE: {
- SrcValueSDNode *SV = cast<SrcValueSDNode>(N);
- ID.AddPointer(SV->getValue());
- ID.AddInteger(SV->getOffset());
+ case ISD::SRCVALUE:
+ ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
+ break;
+ case ISD::MEMOPERAND: {
+ const MemOperand &MO = cast<MemOperandSDNode>(N)->MO;
+ ID.AddPointer(MO.getValue());
+ ID.AddInteger(MO.getFlags());
+ ID.AddInteger(MO.getOffset());
+ ID.AddInteger(MO.getSize());
+ ID.AddInteger(MO.getAlignment());
break;
}
case ISD::FrameIndex:
@@ -916,18 +923,42 @@
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) {
+SDOperand SelectionDAG::getSrcValue(const Value *V) {
assert((!V || isa<PointerType>(V->getType())) &&
"SrcValue is not a pointer?");
FoldingSetNodeID ID;
AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
ID.AddPointer(V);
- ID.AddInteger(Offset);
+
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
- SDNode *N = new SrcValueSDNode(V, Offset);
+
+ SDNode *N = new SrcValueSDNode(V);
+ CSEMap.InsertNode(N, IP);
+ AllNodes.push_back(N);
+ return SDOperand(N, 0);
+}
+
+SDOperand SelectionDAG::getMemOperand(const MemOperand &MO) {
+ const Value *v = MO.getValue();
+ assert((!v || isa<PointerType>(v->getType())) &&
+ "SrcValue is not a pointer?");
+
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
+ ID.AddPointer(v);
+ ID.AddInteger(MO.getFlags());
+ ID.AddInteger(MO.getOffset());
+ ID.AddInteger(MO.getSize());
+ ID.AddInteger(MO.getAlignment());
+
+ void *IP = 0;
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
+ return SDOperand(E, 0);
+
+ SDNode *N = new MemOperandSDNode(MO);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
return SDOperand(N, 0);
@@ -3417,6 +3448,7 @@
void ConstantPoolSDNode::ANCHOR() {}
void BasicBlockSDNode::ANCHOR() {}
void SrcValueSDNode::ANCHOR() {}
+void MemOperandSDNode::ANCHOR() {}
void RegisterSDNode::ANCHOR() {}
void ExternalSymbolSDNode::ANCHOR() {}
void CondCodeSDNode::ANCHOR() {}
@@ -3441,6 +3473,26 @@
TheGlobal = const_cast<GlobalValue*>(GA);
}
+/// getMemOperand - Return a MemOperand object describing the memory
+/// reference performed by this load or store.
+MemOperand LSBaseSDNode::getMemOperand() const {
+ int Size = (MVT::getSizeInBits(getMemoryVT()) + 7) >> 3;
+ int Flags =
+ getOpcode() == ISD::LOAD ? MemOperand::MOLoad : MemOperand::MOStore;
+ if (IsVolatile) Flags |= MemOperand::MOVolatile;
+
+ // Check if the load references a frame index, and does not have
+ // an SV attached.
+ const FrameIndexSDNode *FI =
+ dyn_cast<const FrameIndexSDNode>(getBasePtr().Val);
+ if (!getSrcValue() && FI)
+ return MemOperand(&PseudoSourceValue::FPRel, Flags,
+ FI->getIndex(), Size, Alignment);
+ else
+ return MemOperand(getSrcValue(), Flags,
+ getSrcValueOffset(), Size, Alignment);
+}
+
/// Profile - Gather unique data for the node.
///
void SDNode::Profile(FoldingSetNodeID &ID) {
@@ -3633,6 +3685,7 @@
case ISD::PCMARKER: return "PCMarker";
case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
case ISD::SRCVALUE: return "SrcValue";
+ case ISD::MEMOPERAND: return "MemOperand";
case ISD::EntryToken: return "EntryToken";
case ISD::TokenFactor: return "TokenFactor";
case ISD::AssertSext: return "AssertSext";
@@ -3937,9 +3990,14 @@
cerr << "'" << ES->getSymbol() << "'";
} else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
if (M->getValue())
- cerr << "<" << M->getValue() << ":" << M->getOffset() << ">";
+ cerr << "<" << M->getValue() << ">";
else
- cerr << "<null:" << M->getOffset() << ">";
+ cerr << "<null>";
+ } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
+ if (M->MO.getValue())
+ cerr << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
+ else
+ cerr << "<null:" << M->MO.getOffset() << ">";
} else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
cerr << ":" << MVT::getValueTypeString(N->getVT());
} else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
index 95c791b..719b949 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
@@ -142,9 +142,14 @@
Op += "'" + std::string(ES->getSymbol()) + "'";
} else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(Node)) {
if (M->getValue())
- Op += "<" + M->getValue()->getName() + ":" + itostr(M->getOffset()) + ">";
+ Op += "<" + M->getValue()->getName() + ">";
else
- Op += "<null:" + itostr(M->getOffset()) + ">";
+ Op += "<null>";
+ } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(Node)) {
+ if (M->MO.getValue())
+ Op += "<" + M->MO.getValue()->getName() + ":" + itostr(M->MO.getOffset()) + ">";
+ else
+ Op += "<null:" + itostr(M->MO.getOffset()) + ">";
} else if (const VTSDNode *N = dyn_cast<VTSDNode>(Node)) {
Op = Op + " VT=" + MVT::getValueTypeString(N->getVT());
} else if (const StringSDNode *N = dyn_cast<StringSDNode>(Node)) {