commit c6cc10f48f5956eee4c1947c7b2417423f818077
author Misha Brukman <brukman+llvm@gmail.com> Fri Jun 25 19:24:52 2004 +0000
committer Misha Brukman <brukman+llvm@gmail.com> Fri Jun 25 19:24:52 2004 +0000
tree 49afc8b28fdffa3dec3c77c1053ff252f74f3b13
parent d47bbf7ce53ada1c6a810de82987a05db725f13d

Combine several if stmts with returns into an if-then-elseif-else chain.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14414 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPC32AsmPrinter.cpp

diff --git a/lib/Target/PowerPC/PPC32AsmPrinter.cpp b/lib/Target/PowerPC/PPC32AsmPrinter.cpp
index a200ce7..d778550 100644
--- a/lib/Target/PowerPC/PPC32AsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPC32AsmPrinter.cpp
@@ -490,7 +490,7 @@
   const TargetInstrInfo &TII = *TM.getInstrInfo();
   const TargetInstrDescriptor &Desc = TII.get(Opcode);
   unsigned int i;
-  
+
   unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask;
   unsigned int ArgType[] = {
     (Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask,
@@ -508,7 +508,7 @@
 
   if (Opcode == PPC32::MovePCtoLR) {
     O << "mflr r0\n";
-    O << "bcl 20,31,L" << CurrentFnName << "$pb\n";
+    O << "\tbcl 20,31,L" << CurrentFnName << "$pb\n";
     O << "L" << CurrentFnName << "$pb:\n";
     return;
   }
@@ -524,20 +524,14 @@
     O << ", lo16(";
     printOp(MI->getOperand(2));
     O << "-L" << CurrentFnName << "$pb)\n";
-    return;
-  }
-
-  if (Opcode == PPC32::LOADHiAddr) {
+  } else if (Opcode == PPC32::LOADHiAddr) {
     printOp(MI->getOperand(0));
     O << ", ";
     printOp(MI->getOperand(1));
     O << ", ha16(" ;
     printOp(MI->getOperand(2));
      O << "-L" << CurrentFnName << "$pb)\n";
-    return;
-  }
-  
-  if (ArgCount == 3 && ArgType[1] == PPC32II::Disimm16) {
+  } else if (ArgCount == 3 && ArgType[1] == PPC32II::Disimm16) {
     printOp(MI->getOperand(0));
     O << ", ";
     printOp(MI->getOperand(1));
@@ -562,8 +556,6 @@
         O << ", ";
     }
   }
-  
-  return;  
 }
 
 bool Printer::doInitialization(Module &M) {