misched: trace formatting

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157455 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/MachineScheduler.cpp b/lib/CodeGen/MachineScheduler.cpp
index 4c12c0e..b8eefae 100644
--- a/lib/CodeGen/MachineScheduler.cpp
+++ b/lib/CodeGen/MachineScheduler.cpp
@@ -622,8 +622,6 @@
   CurrentBottom = RegionEnd;
   bool IsTopNode = false;
   while (SUnit *SU = SchedImpl->pickNode(IsTopNode)) {
-    DEBUG(dbgs() << "*** " << (IsTopNode ? "Top" : "Bottom")
-          << " Scheduling Instruction");
     if (!checkSchedLimit())
       break;
 
@@ -671,7 +669,6 @@
     }
     SU->isScheduled = true;
     SchedImpl->schedNode(SU, IsTopNode);
-    DEBUG(SU->dump(this));
   }
   assert(CurrentTop == CurrentBottom && "Nonempty unscheduled zone.");
 
@@ -1198,6 +1195,11 @@
     Top.removeReady(SU);
   if (SU->isBottomReady())
     Bot.removeReady(SU);
+
+  DEBUG(dbgs() << "*** " << (IsTopNode ? "Top" : "Bottom")
+        << " Scheduling Instruction in cycle "
+        << (IsTopNode ? Top.CurrCycle : Bot.CurrCycle) << '\n';
+        SU->dump(DAG));
   return SU;
 }
 
@@ -1205,9 +1207,6 @@
 /// that was just returned by pickNode(). However, ScheduleDAGMI needs to update
 /// it's state based on the current cycle before MachineSchedStrategy.
 void ConvergingScheduler::schedNode(SUnit *SU, bool IsTopNode) {
-  DEBUG(dbgs() << " in cycle " << (IsTopNode ? Top.CurrCycle : Bot.CurrCycle)
-        << '\n');
-
   // Update the reservation table.
   if (IsTopNode && Top.HazardRec->isEnabled()) {
     Top.HazardRec->EmitInstruction(SU);