memory barrier instructions by definition have side effects. This prevents the post-RA scheduler from moving them around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91150 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 406264b..786dcff 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -1574,7 +1574,7 @@
//
// memory barriers protect the atomic sequences
-let isPredicable = 0 in {
+let isPredicable = 0, hasSideEffects = 1 in {
def Int_MemBarrierV7 : AI<(outs), (ins),
Pseudo, NoItinerary,
"dmb", "",