Factor out the code to add a MachineOperand to a MachineInstrBuilder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64891 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp
index 439daae..032eb14 100644
--- a/lib/Target/CellSPU/SPUInstrInfo.cpp
+++ b/lib/Target/CellSPU/SPUInstrInfo.cpp
@@ -352,15 +352,8 @@
     DebugLoc DL = DebugLoc::getUnknownLoc();
     MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc))
       .addReg(SrcReg, false, false, isKill);
-    for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-      MachineOperand &MO = Addr[i];
-      if (MO.isReg())
-        MIB.addReg(MO.getReg());
-      else if (MO.isImm())
-        MIB.addImm(MO.getImm());
-      else
-        MIB.addFrameIndex(MO.getIndex());
-    }
+    for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+      MIB.addOperand(Addr[i]);
     NewMIs.push_back(MIB);
   }
 }
@@ -434,15 +427,8 @@
     }
     DebugLoc DL = DebugLoc::getUnknownLoc();
     MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
-    for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-      MachineOperand &MO = Addr[i];
-      if (MO.isReg())
-        MIB.addReg(MO.getReg());
-      else if (MO.isImm())
-        MIB.addImm(MO.getImm());
-      else
-        MIB.addFrameIndex(MO.getIndex());
-    }
+    for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+      MIB.addOperand(Addr[i]);
     NewMIs.push_back(MIB);
   }
 }