commit c9d1439051d130cfb947ef9ab4a95737c41e2fd1
author Jim Grosbach <grosbach@apple.com> Fri Nov 05 18:48:58 2010 +0000
committer Jim Grosbach <grosbach@apple.com> Fri Nov 05 18:48:58 2010 +0000
tree 0f739dfe9d2f28078bb3574fe01f6dc85cb35fd6
parent 41ed3ca19d406b6eef47c01ea16453f3080f32e8

Allow targets to specify the MachO CPUType/CPUSubtype information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118288 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMAsmBackend.cpp

diff --git a/lib/Target/ARM/ARMAsmBackend.cpp b/lib/Target/ARM/ARMAsmBackend.cpp
index 4be0242..e1c4524 100644
--- a/lib/Target/ARM/ARMAsmBackend.cpp
+++ b/lib/Target/ARM/ARMAsmBackend.cpp
@@ -20,6 +20,7 @@
 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/MC/MachObjectWriter.h"
 #include "llvm/Support/ELF.h"
+#include "llvm/Support/MachO.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetRegistry.h"
@@ -128,7 +129,9 @@
   }
 
   MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
-    return new MachObjectWriter(OS, /*Is64Bit=*/false);
+    // FIXME: Subtarget info should be derived. Force v7 for now.
+    return new MachObjectWriter(OS, /*Is64Bit=*/false, MachO::CPUTypeARM,
+                                MachO::CPUSubType_ARM_V7);
   }
 
   virtual bool doesSectionRequireSymbols(const MCSection &Section) const {

lib/Target/X86/X86AsmBackend.cpp

diff --git a/lib/Target/X86/X86AsmBackend.cpp b/lib/Target/X86/X86AsmBackend.cpp
index 687971d..42643a3 100644
--- a/lib/Target/X86/X86AsmBackend.cpp
+++ b/lib/Target/X86/X86AsmBackend.cpp
@@ -21,6 +21,7 @@
 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/MC/MachObjectWriter.h"
 #include "llvm/Support/ELF.h"
+#include "llvm/Support/MachO.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetRegistry.h"
@@ -396,7 +397,8 @@
   }
 
   MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
-    return new MachObjectWriter(OS, /*Is64Bit=*/false);
+    return new MachObjectWriter(OS, /*Is64Bit=*/false, MachO::CPUTypeI386,
+                                MachO::CPUSubType_I386_ALL);
   }
 };
 
@@ -412,7 +414,8 @@
   }
 
   MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
-    return new MachObjectWriter(OS, /*Is64Bit=*/true);
+    return new MachObjectWriter(OS, /*Is64Bit=*/true, MachO::CPUTypeX86_64,
+                                MachO::CPUSubType_I386_ALL);
   }
 
   virtual bool doesSectionRequireSymbols(const MCSection &Section) const {