commit cb406c25973b4e88a6c10ad839ef1beeb3664715
author Dan Gohman <gohman@apple.com> Wed Oct 03 19:26:29 2007 +0000
committer Dan Gohman <gohman@apple.com> Wed Oct 03 19:26:29 2007 +0000
tree 3f689d854d4d36279b3aee7b018f706739fba3b4
parent 2bb7d0647e5b3f79ad9b6e7efd0dd99f24a0ca69

Use empty() member functions when that's what's being tested for instead
of comparing begin() and end().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42585 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/LiveIntervalAnalysis.cpp

diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index e7abd47..88eeff7 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -817,17 +817,15 @@
 
     MachineBasicBlock::iterator MI = MBB->begin(), miEnd = MBB->end();
 
-    if (MBB->livein_begin() != MBB->livein_end()) {
-      // Create intervals for live-ins to this BB first.
-      for (MachineBasicBlock::const_livein_iterator LI = MBB->livein_begin(),
-             LE = MBB->livein_end(); LI != LE; ++LI) {
-        handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*LI));
-        // Multiple live-ins can alias the same register.
-        for (const unsigned* AS = mri_->getSubRegisters(*LI); *AS; ++AS)
-          if (!hasInterval(*AS))
-            handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*AS),
-                                 true);
-      }
+    // Create intervals for live-ins to this BB first.
+    for (MachineBasicBlock::const_livein_iterator LI = MBB->livein_begin(),
+           LE = MBB->livein_end(); LI != LE; ++LI) {
+      handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*LI));
+      // Multiple live-ins can alias the same register.
+      for (const unsigned* AS = mri_->getSubRegisters(*LI); *AS; ++AS)
+        if (!hasInterval(*AS))
+          handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*AS),
+                               true);
     }
     
     for (; MI != miEnd; ++MI) {

lib/CodeGen/MachineBasicBlock.cpp

diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp
index 134d276..6a8b083 100644
--- a/lib/CodeGen/MachineBasicBlock.cpp
+++ b/lib/CodeGen/MachineBasicBlock.cpp
@@ -119,7 +119,7 @@
   OS << ":\n";
 
   const MRegisterInfo *MRI = MF->getTarget().getRegisterInfo();  
-  if (livein_begin() != livein_end()) {
+  if (!livein_empty()) {
     OS << "Live Ins:";
     for (const_livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I)
       OutputReg(OS, *I, MRI);

lib/CodeGen/MachineFunction.cpp

diff --git a/lib/CodeGen/MachineFunction.cpp b/lib/CodeGen/MachineFunction.cpp
index c762ae5..ca74684 100644
--- a/lib/CodeGen/MachineFunction.cpp
+++ b/lib/CodeGen/MachineFunction.cpp
@@ -208,7 +208,7 @@
   
   const MRegisterInfo *MRI = getTarget().getRegisterInfo();
   
-  if (livein_begin() != livein_end()) {
+  if (!livein_empty()) {
     OS << "Live Ins:";
     for (livein_iterator I = livein_begin(), E = livein_end(); I != E; ++I) {
       if (MRI)
@@ -221,7 +221,7 @@
     }
     OS << "\n";
   }
-  if (liveout_begin() != liveout_end()) {
+  if (!liveout_empty()) {
     OS << "Live Outs:";
     for (liveout_iterator I = liveout_begin(), E = liveout_end(); I != E; ++I)
       if (MRI)

lib/CodeGen/SelectionDAG/ScheduleDAG.cpp

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index d90accd..bd5c598 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -866,7 +866,7 @@
   // that need to be copied into vregs, emit the copies into the top of the
   // block before emitting the code for the block.
   MachineFunction &MF = DAG.getMachineFunction();
-  if (&MF.front() == BB && MF.livein_begin() != MF.livein_end()) {
+  if (&MF.front() == BB) {
     for (MachineFunction::livein_iterator LI = MF.livein_begin(),
          E = MF.livein_end(); LI != E; ++LI)
       if (LI->second) {