commit cbd9a19b5d6ff93efa82c467508ede78b8af3bac
author Nadav Rotem <nrotem@apple.com> Thu Oct 18 23:22:48 2012 +0000
committer Nadav Rotem <nrotem@apple.com> Thu Oct 18 23:22:48 2012 +0000
tree 6e0e27c23dc4e189b0e959be3135b60c05b08759
parent ebd3f27c7e2c6c3a1b76786da0d0205a5fdb1ef5

Reapply the TargerTransformInfo changes, minus the changes to LSR and Lowerinvoke.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166248 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86TargetMachine.cpp

diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index f8cced8..655ede7 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -48,7 +48,8 @@
     InstrInfo(*this),
     TSInfo(*this),
     TLInfo(*this),
-    JITInfo(*this) {
+    JITInfo(*this),
+    STTI(&TLInfo) {
 }
 
 void X86_64TargetMachine::anchor() { }
@@ -64,7 +65,8 @@
     InstrInfo(*this),
     TSInfo(*this),
     TLInfo(*this),
-    JITInfo(*this) {
+    JITInfo(*this),
+    STTI(&TLInfo) {
 }
 
 /// X86TargetMachine ctor - Create an X86 target.