diff --git a/lib/Target/Sparc/InstSelectSimple.cpp b/lib/Target/Sparc/InstSelectSimple.cpp
index 43f2646..527b0bb 100644
--- a/lib/Target/Sparc/InstSelectSimple.cpp
+++ b/lib/Target/Sparc/InstSelectSimple.cpp
@@ -904,7 +904,7 @@
     BuildMI (BB, Opcodes[OpCase], 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
   }
 
-  switch (getClass (I.getType ())) {
+  switch (getClassB (I.getType ())) {
     case cByte: 
       if (I.getType ()->isSigned ()) { // add byte
         BuildMI (BB, V8::ANDri, 2, DestReg).addReg (ResultReg).addZImm (0xff);
@@ -926,7 +926,7 @@
       }
       break;
     case cInt:
-      // Nothing todo here.
+      // Nothing to do here.
       break;
     case cLong:
       // Only support and, or, xor.
diff --git a/lib/Target/Sparc/SparcV8ISelSimple.cpp b/lib/Target/Sparc/SparcV8ISelSimple.cpp
index 43f2646..527b0bb 100644
--- a/lib/Target/Sparc/SparcV8ISelSimple.cpp
+++ b/lib/Target/Sparc/SparcV8ISelSimple.cpp
@@ -904,7 +904,7 @@
     BuildMI (BB, Opcodes[OpCase], 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
   }
 
-  switch (getClass (I.getType ())) {
+  switch (getClassB (I.getType ())) {
     case cByte: 
       if (I.getType ()->isSigned ()) { // add byte
         BuildMI (BB, V8::ANDri, 2, DestReg).addReg (ResultReg).addZImm (0xff);
@@ -926,7 +926,7 @@
       }
       break;
     case cInt:
-      // Nothing todo here.
+      // Nothing to do here.
       break;
     case cLong:
       // Only support and, or, xor.
diff --git a/lib/Target/SparcV8/InstSelectSimple.cpp b/lib/Target/SparcV8/InstSelectSimple.cpp
index 43f2646..527b0bb 100644
--- a/lib/Target/SparcV8/InstSelectSimple.cpp
+++ b/lib/Target/SparcV8/InstSelectSimple.cpp
@@ -904,7 +904,7 @@
     BuildMI (BB, Opcodes[OpCase], 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
   }
 
-  switch (getClass (I.getType ())) {
+  switch (getClassB (I.getType ())) {
     case cByte: 
       if (I.getType ()->isSigned ()) { // add byte
         BuildMI (BB, V8::ANDri, 2, DestReg).addReg (ResultReg).addZImm (0xff);
@@ -926,7 +926,7 @@
       }
       break;
     case cInt:
-      // Nothing todo here.
+      // Nothing to do here.
       break;
     case cLong:
       // Only support and, or, xor.
diff --git a/lib/Target/SparcV8/SparcV8ISelSimple.cpp b/lib/Target/SparcV8/SparcV8ISelSimple.cpp
index 43f2646..527b0bb 100644
--- a/lib/Target/SparcV8/SparcV8ISelSimple.cpp
+++ b/lib/Target/SparcV8/SparcV8ISelSimple.cpp
@@ -904,7 +904,7 @@
     BuildMI (BB, Opcodes[OpCase], 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
   }
 
-  switch (getClass (I.getType ())) {
+  switch (getClassB (I.getType ())) {
     case cByte: 
       if (I.getType ()->isSigned ()) { // add byte
         BuildMI (BB, V8::ANDri, 2, DestReg).addReg (ResultReg).addZImm (0xff);
@@ -926,7 +926,7 @@
       }
       break;
     case cInt:
-      // Nothing todo here.
+      // Nothing to do here.
       break;
     case cLong:
       // Only support and, or, xor.