commit ce7bf1c55f5238870bae2909cd368151f1d813d1
author Anton Korobeynikov <asl@math.spbu.ru> Sat Mar 06 19:39:36 2010 +0000
committer Anton Korobeynikov <asl@math.spbu.ru> Sat Mar 06 19:39:36 2010 +0000
tree 70eb0846345e56a0b7fbe4c6f98306df3ee07c11
parent 043f3c2a0e286dcfd4cc5a16bf006e3c45929516

Initial bits of ARMv4-only support.
Patch by John Tytgat!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97886 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMCodeEmitter.cpp

diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index bd703f4..108a244 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -1138,7 +1138,7 @@
   // Set the conditional execution predicate
   Binary |= II->getPredicate(&MI) << ARMII::CondShift;
 
-  if (TID.Opcode == ARM::BX_RET)
+  if (TID.Opcode == ARM::BX_RET || TID.Opcode == ARM::MOVPCLR)
     // The return register is LR.
     Binary |= ARMRegisterInfo::getRegisterNumbering(ARM::LR);
   else