Start allocating stack space at [ebp-4] to not overwrite the return address.
Also make all loads & stores 4-byte aligned for performance. ;)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4982 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index d78a75c..e5f7ddb 100644
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -50,13 +50,15 @@
RegAllocSimple(TargetMachine &tm) : TM(tm), CurrMBB(0), maxOffset(0),
RegInfo(tm.getRegisterInfo()),
- NumBytesAllocated(0), ByteAlignment(4)
+ ByteAlignment(4)
{
// build reverse mapping for physReg -> register class
RegInfo->buildReg2RegClassMap(PhysReg2RegClassMap);
RegsUsed[RegInfo->getFramePointer()] = 1;
RegsUsed[RegInfo->getStackPointer()] = 1;
+
+ cleanupAfterFunction();
}
bool isAvailableReg(unsigned Reg) {
@@ -80,7 +82,7 @@
void cleanupAfterFunction() {
RegMap.clear();
SSA2PhysRegMap.clear();
- NumBytesAllocated = 0;
+ NumBytesAllocated = 4;
}
/// Moves value from memory into that register
@@ -112,6 +114,7 @@
const TargetRegisterClass *regClass)
{
if (RegMap.find(VirtReg) == RegMap.end()) {
+#if 0
unsigned size = regClass->getDataSize();
unsigned over = NumBytesAllocated - (NumBytesAllocated % ByteAlignment);
if (size >= ByteAlignment - over) {
@@ -120,6 +123,10 @@
}
RegMap[VirtReg] = NumBytesAllocated;
NumBytesAllocated += size;
+#endif
+ // FIXME: forcing each arg to take 4 bytes on the stack
+ RegMap[VirtReg] = NumBytesAllocated;
+ NumBytesAllocated += 4;
}
return RegMap[VirtReg];
}