commit cf14ae550051002283eabfb4dcbd67fa71f46f67
author Anton Korobeynikov <asl@math.spbu.ru> Sun May 03 13:09:40 2009 +0000
committer Anton Korobeynikov <asl@math.spbu.ru> Sun May 03 13:09:40 2009 +0000
tree 51091a1840cee43ed5a0f9e625ff9e12d9014231
parent aecfa7897f5b3854102b27212a4227d378cc7b49

Reverse order of memory arguments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70734 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/MSP430/MSP430AsmPrinter.cpp

diff --git a/lib/Target/MSP430/MSP430AsmPrinter.cpp b/lib/Target/MSP430/MSP430AsmPrinter.cpp
index fb64283..8fc5de6 100644
--- a/lib/Target/MSP430/MSP430AsmPrinter.cpp
+++ b/lib/Target/MSP430/MSP430AsmPrinter.cpp
@@ -161,22 +161,22 @@
 
 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum,
                                           const char* Modifier) {
-  const MachineOperand &Disp = MI->getOperand(OpNum);
-  const MachineOperand &Base = MI->getOperand(OpNum+1);
+  const MachineOperand &Base = MI->getOperand(OpNum);
+  const MachineOperand &Disp = MI->getOperand(OpNum+1);
 
-  if (Disp.isGlobal())
+  if (Base.isGlobal())
     printOperand(MI, OpNum, "mem");
   else if (Disp.isImm() && !Base.getReg())
     printOperand(MI, OpNum);
   else if (Base.getReg()) {
     if (Disp.getImm()) {
-      printOperand(MI, OpNum, "nohash");
+      printOperand(MI, OpNum + 1, "nohash");
       O << '(';
-      printOperand(MI, OpNum + 1);
+      printOperand(MI, OpNum);
       O << ')';
     } else {
       O << '@';
-      printOperand(MI, OpNum + 1);
+      printOperand(MI, OpNum);
     }
   } else
     assert(0 && "Unsupported memory operand");

lib/Target/MSP430/MSP430ISelDAGToDAG.cpp

diff --git a/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp b/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
index c057d69..7fc707b 100644
--- a/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
+++ b/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
@@ -57,7 +57,7 @@
 
   private:
     SDNode *Select(SDValue Op);
-    bool SelectAddr(SDValue Op, SDValue Addr, SDValue &Disp, SDValue &Base);
+    bool SelectAddr(SDValue Op, SDValue Addr, SDValue &Base, SDValue &Disp);
 
   #ifndef NDEBUG
     unsigned Indent;
@@ -74,7 +74,7 @@
 
 // FIXME: This is pretty dummy routine and needs to be rewritten in the future.
 bool MSP430DAGToDAGISel::SelectAddr(SDValue Op, SDValue Addr,
-                                    SDValue &Disp, SDValue &Base) {
+                                    SDValue &Base, SDValue &Disp) {
   // We don't support frame index stuff yet.
   if (isa<FrameIndexSDNode>(Addr))
     return false;
@@ -100,17 +100,17 @@
   case MSP430ISD::Wrapper:
     SDValue N0 = Addr.getOperand(0);
     if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) {
-      Base = CurDAG->getRegister(0, MVT::i16);
-      Disp = CurDAG->getTargetGlobalAddress(G->getGlobal(),
+      Base = CurDAG->getTargetGlobalAddress(G->getGlobal(),
                                             MVT::i16, G->getOffset());
+      Disp = CurDAG->getTargetConstant(0, MVT::i16);
 
       return true;
     }
     break;
   };
 
-  Base = CurDAG->getRegister(0, MVT::i16);
-  Disp = Addr;
+  Base = Addr;
+  Disp = CurDAG->getTargetConstant(0, MVT::i16);
 
   return true;
 }

lib/Target/MSP430/MSP430InstrInfo.td

diff --git a/lib/Target/MSP430/MSP430InstrInfo.td b/lib/Target/MSP430/MSP430InstrInfo.td
index 3944ad7..a0a9440 100644
--- a/lib/Target/MSP430/MSP430InstrInfo.td
+++ b/lib/Target/MSP430/MSP430InstrInfo.td
@@ -52,12 +52,12 @@
 // Address operands
 def memsrc : Operand<i16> {
   let PrintMethod = "printSrcMemOperand";
-  let MIOperandInfo = (ops i16imm, GR16);
+  let MIOperandInfo = (ops GR16, i16imm);
 }
 
 def memdst : Operand<i16> {
   let PrintMethod = "printSrcMemOperand";
-  let MIOperandInfo = (ops i16imm, GR16);
+  let MIOperandInfo = (ops GR16, i16imm);
 }