changes to make it compatible with 64bit gcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2791 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/InstrSelection/InstrSelection.cpp b/lib/CodeGen/InstrSelection/InstrSelection.cpp
index b27f902..c43f8dd 100644
--- a/lib/CodeGen/InstrSelection/InstrSelection.cpp
+++ b/lib/CodeGen/InstrSelection/InstrSelection.cpp
@@ -27,6 +27,7 @@
#include "Support/CommandLine.h"
#include <iostream>
using std::cerr;
+using std::vector;
//******************** Internal Data Declarations ************************/
@@ -152,7 +153,7 @@
//-------------------------------------------------------------------------
void
-InsertPhiElimInstructions(BasicBlock *BB, const vector<MachineInstr*>& CpVec)
+InsertPhiElimInstructions(BasicBlock *BB, const std::vector<MachineInstr*>& CpVec)
{
Instruction *TermInst = (Instruction*)BB->getTerminator();
MachineCodeForInstruction &MC4Term =MachineCodeForInstruction::get(TermInst);
@@ -294,7 +295,7 @@
//
if (treeRoot->opLabel != VRegListOp)
{
- vector<MachineInstr*> minstrVec;
+ std::vector<MachineInstr*> minstrVec;
InstructionNode* instrNode = (InstructionNode*)treeRoot;
assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode);
diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index c7c9756..e884463 100644
--- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -28,6 +28,7 @@
#include <iostream>
#include <math.h>
using std::cerr;
+using std::vector;
RegAllocDebugLevel_t DEBUG_RA;
static cl::Enum<RegAllocDebugLevel_t> DEBUG_RA_c(DEBUG_RA, "dregalloc",