commit cfe5254cd34d9414d9f6b8aa02dc1239d71a703f
author Rafael Espindola <rafael.espindola@gmail.com> Thu Jun 30 21:15:52 2011 +0000
committer Rafael Espindola <rafael.espindola@gmail.com> Thu Jun 30 21:15:52 2011 +0000
tree 72d287c97fad89c6abf4b1268b1adccbc314c96f
parent 77a2c372face15a302f4c9e5cb9acc035b8b3bd3

Create a isFullCopy predicate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134189 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/InlineSpiller.cpp

diff --git a/lib/CodeGen/InlineSpiller.cpp b/lib/CodeGen/InlineSpiller.cpp
index 19ae333..0273891 100644
--- a/lib/CodeGen/InlineSpiller.cpp
+++ b/lib/CodeGen/InlineSpiller.cpp
@@ -180,11 +180,7 @@
 /// isFullCopyOf - If MI is a COPY to or from Reg, return the other register,
 /// otherwise return 0.
 static unsigned isFullCopyOf(const MachineInstr *MI, unsigned Reg) {
-  if (!MI->isCopy())
-    return 0;
-  if (MI->getOperand(0).getSubReg() != 0)
-    return 0;
-  if (MI->getOperand(1).getSubReg() != 0)
+  if (!MI->isFullCopy())
     return 0;
   if (MI->getOperand(0).getReg() == Reg)
       return MI->getOperand(1).getReg();