Convert to the new TargetMachine interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13952 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/FloatingPoint.cpp b/lib/Target/X86/FloatingPoint.cpp
index b6a9ebf..329cdd8 100644
--- a/lib/Target/X86/FloatingPoint.cpp
+++ b/lib/Target/X86/FloatingPoint.cpp
@@ -177,7 +177,7 @@
/// transforming FP instructions into their stack form.
///
bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
- const TargetInstrInfo &TII = MF.getTarget().getInstrInfo();
+ const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
bool Changed = false;
MBB = &BB;
diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp
index 494feb9..c6afdde 100644
--- a/lib/Target/X86/InstSelectSimple.cpp
+++ b/lib/Target/X86/InstSelectSimple.cpp
@@ -638,7 +638,7 @@
/// the current one.
///
void ISel::SelectPHINodes() {
- const TargetInstrInfo &TII = TM.getInstrInfo();
+ const TargetInstrInfo &TII = *TM.getInstrInfo();
const Function &LF = *F->getFunction(); // The LLVM function...
for (Function::const_iterator I = LF.begin(), E = LF.end(); I != E; ++I) {
const BasicBlock *BB = I;
diff --git a/lib/Target/X86/PeepholeOptimizer.cpp b/lib/Target/X86/PeepholeOptimizer.cpp
index a1ef1c7..8e3b831 100644
--- a/lib/Target/X86/PeepholeOptimizer.cpp
+++ b/lib/Target/X86/PeepholeOptimizer.cpp
@@ -456,7 +456,7 @@
bool Changed = false;
- const TargetInstrInfo &TII = MBB.getParent()->getTarget().getInstrInfo();
+ const TargetInstrInfo &TII = *MBB.getParent()->getTarget().getInstrInfo();
// Scan the operands of this instruction. If any operands are
// register-register copies, replace the operand with the source.
diff --git a/lib/Target/X86/Printer.cpp b/lib/Target/X86/Printer.cpp
index 822f6a2..cbc4aea 100644
--- a/lib/Target/X86/Printer.cpp
+++ b/lib/Target/X86/Printer.cpp
@@ -623,7 +623,7 @@
///
void Printer::printMachineInstruction(const MachineInstr *MI) {
unsigned Opcode = MI->getOpcode();
- const TargetInstrInfo &TII = TM.getInstrInfo();
+ const TargetInstrInfo &TII = *TM.getInstrInfo();
const TargetInstrDescriptor &Desc = TII.get(Opcode);
++EmittedInsts;
@@ -921,7 +921,7 @@
MI->getOpcode() == X86::FILD64m ||
MI->getOpcode() == X86::FISTP64m) {
GasBugWorkaroundEmitter gwe(O);
- X86::emitInstruction(gwe, (X86InstrInfo&)TM.getInstrInfo(), *MI);
+ X86::emitInstruction(gwe, (X86InstrInfo&)*TM.getInstrInfo(), *MI);
}
O << TII.getName(MI->getOpcode()) << " ";
diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp
index 822f6a2..cbc4aea 100644
--- a/lib/Target/X86/X86AsmPrinter.cpp
+++ b/lib/Target/X86/X86AsmPrinter.cpp
@@ -623,7 +623,7 @@
///
void Printer::printMachineInstruction(const MachineInstr *MI) {
unsigned Opcode = MI->getOpcode();
- const TargetInstrInfo &TII = TM.getInstrInfo();
+ const TargetInstrInfo &TII = *TM.getInstrInfo();
const TargetInstrDescriptor &Desc = TII.get(Opcode);
++EmittedInsts;
@@ -921,7 +921,7 @@
MI->getOpcode() == X86::FILD64m ||
MI->getOpcode() == X86::FISTP64m) {
GasBugWorkaroundEmitter gwe(O);
- X86::emitInstruction(gwe, (X86InstrInfo&)TM.getInstrInfo(), *MI);
+ X86::emitInstruction(gwe, (X86InstrInfo&)*TM.getInstrInfo(), *MI);
}
O << TII.getName(MI->getOpcode()) << " ";
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 185423a..522231a 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -228,7 +228,7 @@
}
bool Emitter::runOnMachineFunction(MachineFunction &MF) {
- II = &((X86TargetMachine&)MF.getTarget()).getInstrInfo();
+ II = ((X86TargetMachine&)MF.getTarget()).getInstrInfo();
MCE.startFunction(MF);
MCE.emitConstantPool(MF.getConstantPool());
diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp
index b6a9ebf..329cdd8 100644
--- a/lib/Target/X86/X86FloatingPoint.cpp
+++ b/lib/Target/X86/X86FloatingPoint.cpp
@@ -177,7 +177,7 @@
/// transforming FP instructions into their stack form.
///
bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
- const TargetInstrInfo &TII = MF.getTarget().getInstrInfo();
+ const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
bool Changed = false;
MBB = &BB;
diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp
index 494feb9..c6afdde 100644
--- a/lib/Target/X86/X86ISelSimple.cpp
+++ b/lib/Target/X86/X86ISelSimple.cpp
@@ -638,7 +638,7 @@
/// the current one.
///
void ISel::SelectPHINodes() {
- const TargetInstrInfo &TII = TM.getInstrInfo();
+ const TargetInstrInfo &TII = *TM.getInstrInfo();
const Function &LF = *F->getFunction(); // The LLVM function...
for (Function::const_iterator I = LF.begin(), E = LF.end(); I != E; ++I) {
const BasicBlock *BB = I;
diff --git a/lib/Target/X86/X86PeepholeOpt.cpp b/lib/Target/X86/X86PeepholeOpt.cpp
index a1ef1c7..8e3b831 100644
--- a/lib/Target/X86/X86PeepholeOpt.cpp
+++ b/lib/Target/X86/X86PeepholeOpt.cpp
@@ -456,7 +456,7 @@
bool Changed = false;
- const TargetInstrInfo &TII = MBB.getParent()->getTarget().getInstrInfo();
+ const TargetInstrInfo &TII = *MBB.getParent()->getTarget().getInstrInfo();
// Scan the operands of this instruction. If any operands are
// register-register copies, replace the operand with the source.
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 2d0c871..852b710 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -350,7 +350,7 @@
// We need to keep the stack aligned properly. To do this, we round the
// amount of space needed for the outgoing arguments up to the next
// alignment boundary.
- unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
+ unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
Amount = (Amount+Align-1)/Align*Align;
MachineInstr *New;
@@ -450,7 +450,7 @@
// Round the size to a multiple of the alignment (don't forget the 4 byte
// offset though).
- unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
+ unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4;
}
diff --git a/lib/Target/X86/X86SimpInstrSelector.cpp b/lib/Target/X86/X86SimpInstrSelector.cpp
index 288b78e..935f25d 100644
--- a/lib/Target/X86/X86SimpInstrSelector.cpp
+++ b/lib/Target/X86/X86SimpInstrSelector.cpp
@@ -557,7 +557,7 @@
/// the current one.
///
void ISel::SelectPHINodes() {
- const TargetInstrInfo &TII = TM.getInstrInfo();
+ const TargetInstrInfo &TII = *TM.getInstrInfo();
const Function &LF = *F->getFunction(); // The LLVM function...
for (Function::const_iterator I = LF.begin(), E = LF.end(); I != E; ++I) {
const BasicBlock *BB = I;
diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h
index 05b7414..88b91bd 100644
--- a/lib/Target/X86/X86TargetMachine.h
+++ b/lib/Target/X86/X86TargetMachine.h
@@ -30,17 +30,13 @@
public:
X86TargetMachine(const Module &M, IntrinsicLowering *IL);
- virtual const X86InstrInfo &getInstrInfo() const { return InstrInfo; }
- virtual const TargetFrameInfo &getFrameInfo() const { return FrameInfo; }
+ virtual const X86InstrInfo *getInstrInfo() const { return &InstrInfo; }
+ virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
virtual TargetJITInfo *getJITInfo() { return &JITInfo; }
virtual const MRegisterInfo *getRegisterInfo() const {
return &InstrInfo.getRegisterInfo();
}
- // deprecated interfaces
- virtual const TargetSchedInfo &getSchedInfo() const { abort(); }
- virtual const TargetRegInfo &getRegInfo() const { abort(); }
-
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
/// get machine code emitted. This uses a MachineCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address