Teach CellSPU about ELF sections and new section emitter classes.

NB: This is likely to need more work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58832 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/CellSPU/SPUTargetAsmInfo.h b/lib/Target/CellSPU/SPUTargetAsmInfo.h
index 01036bc..d10a565 100644
--- a/lib/Target/CellSPU/SPUTargetAsmInfo.h
+++ b/lib/Target/CellSPU/SPUTargetAsmInfo.h
@@ -11,20 +11,41 @@
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef PPCTARGETASMINFO_H
-#define PPCTARGETASMINFO_H
+#ifndef SPUTARGETASMINFO_H
+#define SPUTARGETASMINFO_H
 
 #include "llvm/Target/TargetAsmInfo.h"
+#include "llvm/Target/ELFTargetAsmInfo.h"
+#include "SPUTargetMachine.h"
+#include "SPUSubtarget.h"
 
 namespace llvm {
 
   // Forward declaration.
   class SPUTargetMachine;
+  
+  template <class BaseTAI>
+  struct SPUTargetAsmInfo : public BaseTAI {
+    explicit SPUTargetAsmInfo(const SPUTargetMachine &TM):
+      BaseTAI(TM) {
+      /* (unused today)
+       * const SPUSubtarget *Subtarget = &TM.getSubtarget<SPUSubtarget>(); */
 
-  struct SPUTargetAsmInfo : public TargetAsmInfo {
-    SPUTargetAsmInfo(const SPUTargetMachine &TM);
+      BaseTAI::ZeroDirective = "\t.space\t";
+      BaseTAI::SetDirective = "\t.set";
+      BaseTAI::Data64bitsDirective = "\t.quad\t";
+      BaseTAI::AlignmentIsInBytes = false;
+      BaseTAI::LCOMMDirective = "\t.lcomm\t";
+      BaseTAI::InlineAsmStart = "# InlineAsm Start";
+      BaseTAI::InlineAsmEnd = "# InlineAsm End";
+    }
   };
-
+  
+  struct SPULinuxTargetAsmInfo : public SPUTargetAsmInfo<ELFTargetAsmInfo> {
+    explicit SPULinuxTargetAsmInfo(const SPUTargetMachine &TM);
+    virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
+                                           bool Global) const;
+  };
 } // namespace llvm
 
-#endif
+#endif /* SPUTARGETASMINFO_H */