| commit | d065c813c83fe4738827940d07b0a4a6d2a2a449 | [log] [tgz] |
|---|---|---|
| author | Chris Lattner <sabre@nondot.org> | Mon May 01 05:56:51 2006 +0000 |
| committer | Chris Lattner <sabre@nondot.org> | Mon May 01 05:56:51 2006 +0000 |
| tree | dc36ea5677a087c24d5d0d8d17ba5053d9c4926e | |
| parent | 99f2632b4b84a9ad8bad43d8ff56c7ae1393371e [diff] [blame] |
Intel mode no longer uses %'s on registers git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28028 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/X86/fast-cc-merge-stack-adj.ll b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll index de8372c..f31b180 100644 --- a/test/CodeGen/X86/fast-cc-merge-stack-adj.ll +++ b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll
@@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'add %ESP, 8' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'add ESP, 8' target triple = "i686-pc-linux-gnu"