Intel mode no longer uses %'s on registers


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28028 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/X86/overlap-shift.ll b/test/CodeGen/X86/overlap-shift.ll
index 4d8c688..48f91e0 100644
--- a/test/CodeGen/X86/overlap-shift.ll
+++ b/test/CodeGen/X86/overlap-shift.ll
@@ -6,7 +6,7 @@
 
 ; Check that the shift gets turned into an LEA.
 
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov %E.X, %E.X'
+; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov E.X, E.X'
 
 %G = external global int