commit d23a41c153712b929bd84f5e713bda5db5d6e66d
author Hal Finkel <hfinkel@anl.gov> Fri Jan 25 14:49:08 2013 +0000
committer Hal Finkel <hfinkel@anl.gov> Fri Jan 25 14:49:08 2013 +0000
tree 0510f2d72a79dbbdb6f6db2438d4b7ea3006da3c
parent 4a9256f265a7fcccd1f04518b55fd751f3a920a8

Add an addition operator to TableGen

This adds an !add(a, b) operator to tablegen; this will be used
to cleanup the PPC register definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173445 91177308-0d34-0410-b5e6-96231b3b80d8

lib/TableGen/TGParser.cpp

diff --git a/lib/TableGen/TGParser.cpp b/lib/TableGen/TGParser.cpp
index 8ee3a7b..da0086a 100644
--- a/lib/TableGen/TGParser.cpp
+++ b/lib/TableGen/TGParser.cpp
@@ -912,6 +912,7 @@
   }
 
   case tgtok::XConcat:
+  case tgtok::XADD:
   case tgtok::XSRA:
   case tgtok::XSRL:
   case tgtok::XSHL:
@@ -927,6 +928,7 @@
     switch (OpTok) {
     default: llvm_unreachable("Unhandled code!");
     case tgtok::XConcat: Code = BinOpInit::CONCAT;Type = DagRecTy::get(); break;
+    case tgtok::XADD:    Code = BinOpInit::ADD;   Type = IntRecTy::get(); break;
     case tgtok::XSRA:    Code = BinOpInit::SRA;   Type = IntRecTy::get(); break;
     case tgtok::XSRL:    Code = BinOpInit::SRL;   Type = IntRecTy::get(); break;
     case tgtok::XSHL:    Code = BinOpInit::SHL;   Type = IntRecTy::get(); break;
@@ -1142,6 +1144,7 @@
 ///   SimpleValue ::= '[' ValueList ']'
 ///   SimpleValue ::= '(' IDValue DagArgList ')'
 ///   SimpleValue ::= CONCATTOK '(' Value ',' Value ')'
+///   SimpleValue ::= ADDTOK '(' Value ',' Value ')'
 ///   SimpleValue ::= SHLTOK '(' Value ',' Value ')'
 ///   SimpleValue ::= SRATOK '(' Value ',' Value ')'
 ///   SimpleValue ::= SRLTOK '(' Value ',' Value ')'
@@ -1397,6 +1400,7 @@
   case tgtok::XEmpty:
   case tgtok::XCast:  // Value ::= !unop '(' Value ')'
   case tgtok::XConcat:
+  case tgtok::XADD:
   case tgtok::XSRA:
   case tgtok::XSRL:
   case tgtok::XSHL: