Remove the IA-64 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76920 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index cf22826..2f716a2 100644
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -1380,9 +1380,9 @@
for <tt>RegisterClass</tt>, the last parameter of which is a list of
registers. Just commenting some out is one simple way to avoid them being
used. A more polite way is to explicitly exclude some registers from
- the <i>allocation order</i>. See the definition of the <tt>GR</tt> register
- class in <tt>lib/Target/IA64/IA64RegisterInfo.td</tt> for an example of this
- (e.g., <tt>numReservedRegs</tt> registers are hidden.)</p>
+ the <i>allocation order</i>. See the definition of the <tt>GR8</tt> register
+ class in <tt>lib/Target/X86/X86RegisterInfo.td</tt> for an example of this.
+ </p>
<p>Virtual registers are also denoted by integer numbers. Contrary to physical
registers, different virtual registers never share the same number. The
diff --git a/docs/ReleaseNotes-2.6.html b/docs/ReleaseNotes-2.6.html
index 4281130..f1b8852 100644
--- a/docs/ReleaseNotes-2.6.html
+++ b/docs/ReleaseNotes-2.6.html
@@ -491,7 +491,6 @@
support is available for native builds with Visual C++).</li>
<li>Sun UltraSPARC workstations running Solaris 10.</li>
<li>Alpha-based machines running Debian GNU/Linux.</li>
-<li>Itanium-based (IA64) machines running Linux and HP-UX.</li>
</ul>
<p>The core LLVM infrastructure uses GNU autoconf to adapt itself
@@ -540,7 +539,7 @@
href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev">LLVMdev list</a>.</p>
<ul>
-<li>The MSIL, IA64, Alpha, SPU, MIPS, and PIC16 backends are experimental.</li>
+<li>The MSIL, Alpha, SPU, MIPS, and PIC16 backends are experimental.</li>
<li>The <tt>llc</tt> "<tt>-filetype=asm</tt>" (the default) is the only
supported value for this option.</li>
</ul>
@@ -654,21 +653,6 @@
<!-- ======================================================================= -->
<div class="doc_subsection">
- <a name="ia64-be">Known problems with the IA64 back-end</a>
-</div>
-
-<div class="doc_text">
-
-<ul>
-<li>The Itanium backend is highly experimental and has a number of known
- issues. We are looking for a maintainer for the Itanium backend. If you
- are interested, please contact the LLVMdev mailing list.</li>
-</ul>
-
-</div>
-
-<!-- ======================================================================= -->
-<div class="doc_subsection">
<a name="c-be">Known problems with the C back-end</a>
</div>
diff --git a/docs/UsingLibraries.html b/docs/UsingLibraries.html
index ded2d81..b1a3b4d 100644
--- a/docs/UsingLibraries.html
+++ b/docs/UsingLibraries.html
@@ -128,8 +128,6 @@
<td>Code generation for ARM architecture</td></tr>
<tr><td>LLVMCBackend</td><td><tt>.o</tt></td>
<td>'C' language code generator.</td></tr>
- <tr><td>LLVMIA64</td><td><tt>.o</tt></td>
- <td>Code generation for IA64 architecture</td></tr>
<tr><td>LLVMPowerPC</td><td><tt>.o</tt></td>
<td>Code generation for PowerPC architecture</td></tr>
<tr><td>LLVMSparc</td><td><tt>.o</tt></td>
@@ -356,14 +354,6 @@
<li>libLLVMSystem.a</li>
<li>libLLVMTarget.a</li>
</ul></dd>
- <dt><b>LLVMIA64.o</b></dt><dd><ul>
- <li>libLLVMCodeGen.a</li>
- <li>libLLVMCore.a</li>
- <li>libLLVMSelectionDAG.a</li>
- <li>libLLVMSupport.a</li>
- <li>libLLVMSystem.a</li>
- <li>libLLVMTarget.a</li>
- </ul></dd>
<dt><b>LLVMInterpreter.o</b></dt><dd><ul>
<li>LLVMExecutionEngine.o</li>
<li>libLLVMCodeGen.a</li>