commit d453960f92993600c56e5b4c004cadca9d4f7dc8
author Andrew Trick <atrick@apple.com> Tue Dec 18 20:52:52 2012 +0000
committer Andrew Trick <atrick@apple.com> Tue Dec 18 20:52:52 2012 +0000
tree 9257e294883e2b4d7bfa29e82893f25f7a91a512
parent 071966f6bf2a535b318995cfa5d0f5b641fb4e14

MISched: cleanup, use the proper iterator type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170450 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/MachineScheduler.cpp

diff --git a/lib/CodeGen/MachineScheduler.cpp b/lib/CodeGen/MachineScheduler.cpp
index d49eda2..fbbae38 100644
--- a/lib/CodeGen/MachineScheduler.cpp
+++ b/lib/CodeGen/MachineScheduler.cpp
@@ -1213,7 +1213,7 @@
   if (SU->isScheduled)
     return;
 
-  for (SUnit::succ_iterator I = SU->Preds.begin(), E = SU->Preds.end();
+  for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
        I != E; ++I) {
     unsigned PredReadyCycle = I->getSUnit()->TopReadyCycle;
     unsigned MinLatency = I->getMinLatency();