commit d71295a684fb351e196f4f78ea94e5d1af904eb8
author Misha Brukman <brukman+llvm@gmail.com> Wed Dec 17 22:04:00 2003 +0000
committer Misha Brukman <brukman+llvm@gmail.com> Wed Dec 17 22:04:00 2003 +0000
tree ebc260c7a6036eb8c698cd062804a8beacbc9e31
parent 3e7ada642a00c6904231f2446b33c7f15bb45151

Reorganized the Sparc backend to be more modular -- each different
implementation of a Target{RegInfo, InstrInfo, Machine, etc} now has a separate
header and a separate implementation file.

This means that instead of a massive SparcInternals.h that forces a
recompilation of the whole target whenever a minor detail is changed, you should
only recompile a few files.

Note that SparcInternals.h is still around; its contents should be minimized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10500 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/SparcV9/SparcV9InstrSelection.cpp

diff --git a/lib/Target/SparcV9/SparcV9InstrSelection.cpp b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
index 21e884b..c5fa145 100644
--- a/lib/Target/SparcV9/SparcV9InstrSelection.cpp
+++ b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
@@ -11,9 +11,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "SparcInstrSelectionSupport.h"
-#include "SparcInternals.h"
-#include "SparcRegClassInfo.h"
 #include "llvm/Constants.h"
 #include "llvm/ConstantHandling.h"
 #include "llvm/DerivedTypes.h"
@@ -28,6 +25,10 @@
 #include "llvm/CodeGen/MachineFunctionInfo.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineInstrAnnot.h"
+#include "SparcInstrSelectionSupport.h"
+#include "SparcInternals.h"
+#include "SparcRegClassInfo.h"
+#include "SparcRegInfo.h"
 #include "Support/MathExtras.h"
 #include <algorithm>
 #include <cmath>
@@ -1583,8 +1584,8 @@
         //     -- For non-FP values, create an add-with-0 instruction
         // 
         if (retVal != NULL) {
-          const UltraSparcRegInfo& regInfo =
-            (UltraSparcRegInfo&) target.getRegInfo();
+          const SparcRegInfo& regInfo =
+            (SparcRegInfo&) target.getRegInfo();
           const Type* retType = retVal->getType();
           unsigned regClassID = regInfo.getRegClassIDOfType(retType);
           unsigned retRegNum = (retType->isFloatingPoint()
@@ -2488,8 +2489,8 @@
           MachineFunction& MF = MachineFunction::get(currentFunc);
           MachineCodeForInstruction& mcfi =
             MachineCodeForInstruction::get(callInstr); 
-          const UltraSparcRegInfo& regInfo =
-            (UltraSparcRegInfo&) target.getRegInfo();
+          const SparcRegInfo& regInfo =
+            (SparcRegInfo&) target.getRegInfo();
           const TargetFrameInfo& frameInfo = target.getFrameInfo();
 
           // Create hidden virtual register for return address with type void*