Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index 87b09a2..da729ae 100644
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -190,7 +190,7 @@
for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
MachineOperand &MO = MI->getOperand(i);
- if (MO.isRegister() && MO.getReg() &&
+ if (MO.isReg() && MO.getReg() &&
TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
unsigned virtualReg = (unsigned) MO.getReg();
DOUT << "op: " << MO << "\n";
@@ -209,7 +209,7 @@
// must be same register number as the source operand that is
// tied to. This maps a = b + c into b = b + c, and saves b into
// a's spot.
- assert(MI->getOperand(TiedOp).isRegister() &&
+ assert(MI->getOperand(TiedOp).isReg() &&
MI->getOperand(TiedOp).getReg() &&
MI->getOperand(TiedOp).isUse() &&
"Two address instruction invalid!");