commit d735b8019b0f297d7c14b55adcd887af24d8e602
author Dan Gohman <gohman@apple.com> Fri Oct 03 15:45:36 2008 +0000
committer Dan Gohman <gohman@apple.com> Fri Oct 03 15:45:36 2008 +0000
tree 9019ef6d07a30709c5afbe52903a7cdfd9615cb1
parent 06a62886fbca6214945958e28b16a82b470f6b2e

Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PIC16/PIC16AsmPrinter.cpp

diff --git a/lib/Target/PIC16/PIC16AsmPrinter.cpp b/lib/Target/PIC16/PIC16AsmPrinter.cpp
index 5102e7a..d765d75 100644
--- a/lib/Target/PIC16/PIC16AsmPrinter.cpp
+++ b/lib/Target/PIC16/PIC16AsmPrinter.cpp
@@ -288,7 +288,7 @@
 void PIC16AsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) 
 {
   const MachineOperand &MO = MI->getOperand(OpNum);
-  assert(MO.isImmediate() && "Not a valid so_imm value!");
+  assert(MO.isImm() && "Not a valid so_imm value!");
   printSOImm(O, MO.getImm(), TAI);
 }
 
@@ -298,19 +298,19 @@
   const MachineOperand &MO1 = MI->getOperand(Op);
   const MachineOperand &MO2 = MI->getOperand(Op+1);
 
-  if (MO2.isFrameIndex ()) {
+  if (MO2.isFI()) {
     printOperand(MI, Op+1);
     return;
   }
 
-  if (!MO1.isRegister()) {   
+  if (!MO1.isReg()) {
     // FIXME: This is for CP entries, but isn't right.
     printOperand(MI, Op);
     return;
   }
 
   // If this is Stack Slot
-  if (MO1.isRegister()) {  
+  if (MO1.isReg()) {
     if (strcmp(TM.getRegisterInfo()->get(MO1.getReg()).Name, "SP") == 0) {
       O << CurrentFnName <<"_"<< MO2.getImm();
       return;