Fix comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23686 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index f15ce57..1e5499a 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -216,7 +216,7 @@
}
return false;
case ISD::ADD:
- // (add X, Y) & C == 0 iff (X&C)&(Y&C) == 0 and all bits are low bits.
+ // (add X, Y) & C == 0 iff (X&C)|(Y&C) == 0 and all bits are low bits.
if ((Mask&(Mask+1)) == 0) { // All low bits
if (MaskedValueIsZero(Op.getOperand(0), Mask, TLI) &&
MaskedValueIsZero(Op.getOperand(1), Mask, TLI))