commit d80c13bfed9adb8fadcd4e58294958c4b8566199
author Akira Hatanaka <ahatanaka@mips.com> Fri Sep 30 17:19:21 2011 +0000
committer Akira Hatanaka <ahatanaka@mips.com> Fri Sep 30 17:19:21 2011 +0000
tree 2092ac4e92b499fc18151063feb40ec7b3b8b0a6
parent 7850dd0f25ccc5da6df54999a907e1277ed055d6

Check values of immediate operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140860 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/Mips/mips64instrs.ll

diff --git a/test/CodeGen/Mips/mips64instrs.ll b/test/CodeGen/Mips/mips64instrs.ll
index 8cbb5b9..67776aa 100644
--- a/test/CodeGen/Mips/mips64instrs.ll
+++ b/test/CodeGen/Mips/mips64instrs.ll
@@ -37,35 +37,35 @@
 
 define i64 @f7(i64 %a0) nounwind readnone {
 entry:
-; CHECK: daddiu
+; CHECK: daddiu ${{[0-9]+}}, ${{[0-9]+}}, 20
   %add = add nsw i64 %a0, 20
   ret i64 %add
 }
 
 define i64 @f8(i64 %a0) nounwind readnone {
 entry:
-; CHECK: daddiu
+; CHECK: daddiu ${{[0-9]+}}, ${{[0-9]+}}, -20
   %sub = add nsw i64 %a0, -20
   ret i64 %sub
 }
 
 define i64 @f9(i64 %a0) nounwind readnone {
 entry:
-; CHECK: andi
+; CHECK: andi ${{[0-9]+}}, ${{[0-9]+}}, 20
   %and = and i64 %a0, 20
   ret i64 %and
 }
 
 define i64 @f10(i64 %a0) nounwind readnone {
 entry:
-; CHECK: ori
+; CHECK: ori ${{[0-9]+}}, ${{[0-9]+}}, 20
   %or = or i64 %a0, 20
   ret i64 %or
 }
 
 define i64 @f11(i64 %a0) nounwind readnone {
 entry:
-; CHECK: xori
+; CHECK: xori ${{[0-9]+}}, ${{[0-9]+}}, 20
   %xor = xor i64 %a0, 20
   ret i64 %xor
 }

test/CodeGen/Mips/mips64shift.ll

diff --git a/test/CodeGen/Mips/mips64shift.ll b/test/CodeGen/Mips/mips64shift.ll
index 31e56c8..24decbb 100644
--- a/test/CodeGen/Mips/mips64shift.ll
+++ b/test/CodeGen/Mips/mips64shift.ll
@@ -23,42 +23,42 @@
 
 define i64 @f3(i64 %a0) nounwind readnone {
 entry:
-; CHECK: dsll
+; CHECK: dsll ${{[0-9]+}}, ${{[0-9]+}}, 10
   %shl = shl i64 %a0, 10
   ret i64 %shl
 }
 
 define i64 @f4(i64 %a0) nounwind readnone {
 entry:
-; CHECK: dsra
+; CHECK: dsra ${{[0-9]+}}, ${{[0-9]+}}, 10
   %shr = ashr i64 %a0, 10
   ret i64 %shr
 }
 
 define i64 @f5(i64 %a0) nounwind readnone {
 entry:
-; CHECK: dsrl
+; CHECK: dsrl ${{[0-9]+}}, ${{[0-9]+}}, 10
   %shr = lshr i64 %a0, 10
   ret i64 %shr
 }
 
 define i64 @f6(i64 %a0) nounwind readnone {
 entry:
-; CHECK: dsll32
+; CHECK: dsll32 ${{[0-9]+}}, ${{[0-9]+}}, 8
   %shl = shl i64 %a0, 40
   ret i64 %shl
 }
 
 define i64 @f7(i64 %a0) nounwind readnone {
 entry:
-; CHECK: dsra32
+; CHECK: dsra32 ${{[0-9]+}}, ${{[0-9]+}}, 8
   %shr = ashr i64 %a0, 40
   ret i64 %shr
 }
 
 define i64 @f8(i64 %a0) nounwind readnone {
 entry:
-; CHECK: dsrl32
+; CHECK: dsrl32 ${{[0-9]+}}, ${{[0-9]+}}, 8
   %shr = lshr i64 %a0, 40
   ret i64 %shr
 }