Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index 5a24b26..08f2eb2 100644
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -630,6 +630,9 @@
<< " } else if (MI->getOpcode() == TargetInstrInfo::DECLARE) {\n"
<< " printDeclare(MI);\n"
<< " return true;\n"
+ << " } else if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {\n"
+ << " printImplicitDef(MI);\n"
+ << " return true;\n"
<< " }\n\n";
O << " O << \"\\t\";\n\n";
diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index 60d196c..bebf1fd 100644
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -29,7 +29,8 @@
R->getName() == "LABEL" ||
R->getName() == "DECLARE" ||
R->getName() == "EXTRACT_SUBREG" ||
- R->getName() == "INSERT_SUBREG") continue;
+ R->getName() == "INSERT_SUBREG" ||
+ R->getName() == "IMPLICIT_DEF") continue;
BitsInit *BI = R->getValueAsBitsInit("Inst");
@@ -103,7 +104,8 @@
R->getName() == "LABEL" ||
R->getName() == "DECLARE" ||
R->getName() == "EXTRACT_SUBREG" ||
- R->getName() == "INSERT_SUBREG") {
+ R->getName() == "INSERT_SUBREG" ||
+ R->getName() == "IMPLICIT_DEF") {
o << " 0U";
continue;
}
@@ -136,7 +138,8 @@
InstName == "LABEL"||
InstName == "DECLARE"||
InstName == "EXTRACT_SUBREG" ||
- InstName == "INSERT_SUBREG") continue;
+ InstName == "INSERT_SUBREG" ||
+ InstName == "IMPLICIT_DEF") continue;
BitsInit *BI = R->getValueAsBitsInit("Inst");
const std::vector<RecordVal> &Vals = R->getValues();
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index b9730a5..e41f75a 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -304,6 +304,11 @@
throw "Could not find 'INSERT_SUBREG' instruction!";
const CodeGenInstruction *INSERT_SUBREG = &I->second;
+ I = getInstructions().find("IMPLICIT_DEF");
+ if (I == Instructions.end())
+ throw "Could not find 'IMPLICIT_DEF' instruction!";
+ const CodeGenInstruction *IMPLICIT_DEF = &I->second;
+
// Print out the rest of the instructions now.
NumberedInstructions.push_back(PHI);
NumberedInstructions.push_back(INLINEASM);
@@ -311,13 +316,15 @@
NumberedInstructions.push_back(DECLARE);
NumberedInstructions.push_back(EXTRACT_SUBREG);
NumberedInstructions.push_back(INSERT_SUBREG);
+ NumberedInstructions.push_back(IMPLICIT_DEF);
for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
if (&II->second != PHI &&
&II->second != INLINEASM &&
&II->second != LABEL &&
&II->second != DECLARE &&
&II->second != EXTRACT_SUBREG &&
- &II->second != INSERT_SUBREG)
+ &II->second != INSERT_SUBREG &&
+ &II->second != IMPLICIT_DEF)
NumberedInstructions.push_back(&II->second);
}
diff --git a/utils/TableGen/DAGISelEmitter.cpp b/utils/TableGen/DAGISelEmitter.cpp
index 0c6afab..dc95e79 100644
--- a/utils/TableGen/DAGISelEmitter.cpp
+++ b/utils/TableGen/DAGISelEmitter.cpp
@@ -1825,7 +1825,12 @@
"Ops.size());\n"
<< " return New.Val;\n"
<< "}\n\n";
-
+
+ OS << "SDNode *Select_UNDEF(const SDOperand &N) {\n"
+ << " return CurDAG->getTargetNode(TargetInstrInfo::IMPLICIT_DEF,\n"
+ << " N.getValueType());\n"
+ << "}\n\n";
+
OS << "SDNode *Select_LABEL(const SDOperand &N) {\n"
<< " SDOperand Chain = N.getOperand(0);\n"
<< " SDOperand N1 = N.getOperand(1);\n"
@@ -1926,7 +1931,8 @@
<< " case ISD::LABEL: return Select_LABEL(N);\n"
<< " case ISD::DECLARE: return Select_DECLARE(N);\n"
<< " case ISD::EXTRACT_SUBREG: return Select_EXTRACT_SUBREG(N);\n"
- << " case ISD::INSERT_SUBREG: return Select_INSERT_SUBREG(N);\n";
+ << " case ISD::INSERT_SUBREG: return Select_INSERT_SUBREG(N);\n"
+ << " case ISD::UNDEF: return Select_UNDEF(N);\n";
// Loop over all of the case statements, emiting a call to each method we
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index 3be3626..2ac7634 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -411,7 +411,8 @@
R->getName() != "LABEL" &&
R->getName() != "DECLARE" &&
R->getName() != "EXTRACT_SUBREG" &&
- R->getName() != "INSERT_SUBREG")
+ R->getName() != "INSERT_SUBREG" &&
+ R->getName() != "IMPLICIT_DEF")
throw R->getName() + " doesn't have a field named '" +
Val->getValue() + "'!";
return;