R600: Factorize maximum alu per clause in a single location
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178667 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/R600/R600EmitClauseMarkers.cpp b/lib/Target/R600/R600EmitClauseMarkers.cpp
index bda3703..06cf8ac 100644
--- a/lib/Target/R600/R600EmitClauseMarkers.cpp
+++ b/lib/Target/R600/R600EmitClauseMarkers.cpp
@@ -201,7 +201,7 @@
!SubstituteKCacheBank(I, KCacheBanks))
break;
AluInstCount += OccupiedDwords(I);
- if (AluInstCount > 124)
+ if (AluInstCount > TII->getMaxAlusPerClause())
break;
}
unsigned Opcode = PushBeforeModifier ?
diff --git a/lib/Target/R600/R600InstrInfo.cpp b/lib/Target/R600/R600InstrInfo.cpp
index 0865098..b232188 100644
--- a/lib/Target/R600/R600InstrInfo.cpp
+++ b/lib/Target/R600/R600InstrInfo.cpp
@@ -645,6 +645,9 @@
return &AMDGPU::IndirectRegRegClass;
}
+unsigned R600InstrInfo::getMaxAlusPerClause() const {
+ return 115;
+}
MachineInstrBuilder R600InstrInfo::buildDefaultInstruction(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
diff --git a/lib/Target/R600/R600InstrInfo.h b/lib/Target/R600/R600InstrInfo.h
index bf9569e..dbae900 100644
--- a/lib/Target/R600/R600InstrInfo.h
+++ b/lib/Target/R600/R600InstrInfo.h
@@ -145,6 +145,7 @@
virtual const TargetRegisterClass *getSuperIndirectRegClass() const;
+ unsigned getMaxAlusPerClause() const;
///buildDefaultInstruction - This function returns a MachineInstr with
/// all the instruction modifiers initialized to their default values.
diff --git a/lib/Target/R600/R600MachineScheduler.cpp b/lib/Target/R600/R600MachineScheduler.cpp
index 9074364..a777142 100644
--- a/lib/Target/R600/R600MachineScheduler.cpp
+++ b/lib/Target/R600/R600MachineScheduler.cpp
@@ -37,7 +37,7 @@
CurInstKind = IDOther;
CurEmitted = 0;
OccupedSlotsMask = 15;
- InstKindLimit[IDAlu] = 120; // 120 minus 8 for security
+ InstKindLimit[IDAlu] = TII->getMaxAlusPerClause();
const AMDGPUSubtarget &ST = DAG->TM.getSubtarget<AMDGPUSubtarget>();