Rewrite tblgen handling of subtarget features so
it follows the order of the enum, not alphabetical.
The motivation is to make -mattr=+ssse3,+sse41
select SSE41 as it ought to. Added "ignored"
enum values of 0 to PPC and SPU to avoid compiler
warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47143 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/CellSPU/SPUSubtarget.h b/lib/Target/CellSPU/SPUSubtarget.h
index 2ee7bb8..51dd44c 100644
--- a/lib/Target/CellSPU/SPUSubtarget.h
+++ b/lib/Target/CellSPU/SPUSubtarget.h
@@ -26,6 +26,7 @@
namespace SPU {
enum {
+ PROC_NONE,
DEFAULT_PROC
};
}
diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 71ce147..605dc12 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -849,6 +849,7 @@
bool DarwinAsmPrinter::doInitialization(Module &M) {
static const char *CPUDirectives[] = {
+ "",
"ppc",
"ppc601",
"ppc602",
diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp
index dff53ba..030dc7a 100644
--- a/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -60,6 +60,7 @@
const std::string &FS, bool is64Bit)
: TM(tm)
, StackAlignment(16)
+ , DarwinDirective(PPC::DIR_NONE)
, IsGigaProcessor(false)
, Has64BitSupport(false)
, Use64BitRegs(false)
diff --git a/lib/Target/PowerPC/PPCSubtarget.h b/lib/Target/PowerPC/PPCSubtarget.h
index c55e097..be4c21c 100644
--- a/lib/Target/PowerPC/PPCSubtarget.h
+++ b/lib/Target/PowerPC/PPCSubtarget.h
@@ -27,6 +27,7 @@
namespace PPC {
// -m directive values.
enum {
+ DIR_NONE,
DIR_32,
DIR_601,
DIR_602,
diff --git a/utils/TableGen/SubtargetEmitter.cpp b/utils/TableGen/SubtargetEmitter.cpp
index 1f34bcc..5e7688a 100644
--- a/utils/TableGen/SubtargetEmitter.cpp
+++ b/utils/TableGen/SubtargetEmitter.cpp
@@ -482,8 +482,12 @@
const std::string &Value = R->getValueAsString("Value");
const std::string &Attribute = R->getValueAsString("Attribute");
- OS << " if ((Bits & " << Instance << ") != 0) "
- << Attribute << " = " << Value << ";\n";
+ if (Value=="true" || Value=="false")
+ OS << " if ((Bits & " << Instance << ") != 0) "
+ << Attribute << " = " << Value << ";\n";
+ else
+ OS << " if ((Bits & " << Instance << ") != 0 && " << Attribute <<
+ " < " << Value << ") " << Attribute << " = " << Value << ";\n";
}
if (HasItineraries) {