Generalize a pattern for PKHTB: an SRL of 16-31 bits will guarantee
that the high halfword is zero. The shift need not be exactly 16 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111196 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/ARM/pack.ll b/test/CodeGen/ARM/pack.ll
index 887f140..25a3ccd 100644
--- a/test/CodeGen/ARM/pack.ll
+++ b/test/CodeGen/ARM/pack.ll
@@ -38,7 +38,7 @@
}
; CHECK: test4
-; CHECK: pkhbt r0, r0, r1
+; CHECK: pkhbt r0, r0, r1, lsl #0
define i32 @test4(i32 %X, i32 %Y) {
%tmp1 = and i32 %X, 65535 ; <i32> [#uses=1]
%tmp3 = and i32 %Y, -65536 ; <i32> [#uses=1]
@@ -86,3 +86,12 @@
%tmp57 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1]
ret i32 %tmp57
}
+
+; CHECK: test8
+; CHECK: pkhtb r0, r0, r1, asr #22
+define i32 @test8(i32 %X, i32 %Y) {
+ %tmp1 = and i32 %X, -65536
+ %tmp3 = lshr i32 %Y, 22
+ %tmp57 = or i32 %tmp3, %tmp1
+ ret i32 %tmp57
+}