Generalize the HazardRecognizer interface so that it can be used
to support MachineInstr-based scheduling in addition to
SDNode-based scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62284 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/CellSPU/SPUHazardRecognizers.cpp b/lib/Target/CellSPU/SPUHazardRecognizers.cpp
index 26392ed..caaa71a 100644
--- a/lib/Target/CellSPU/SPUHazardRecognizers.cpp
+++ b/lib/Target/CellSPU/SPUHazardRecognizers.cpp
@@ -17,6 +17,8 @@
#include "SPUHazardRecognizers.h"
#include "SPU.h"
#include "SPUInstrInfo.h"
+#include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/Support/Debug.h"
using namespace llvm;
@@ -38,14 +40,15 @@
/// instruction. Currently returns NoHazard.
///
/// \return NoHazard
-HazardRecognizer::HazardType
-SPUHazardRecognizer::getHazardType(SDNode *Node)
+ScheduleHazardRecognizer::HazardType
+SPUHazardRecognizer::getHazardType(SUnit *SU)
{
// Initial thoughts on how to do this, but this code cannot work unless the
// function's prolog and epilog code are also being scheduled so that we can
// accurately determine which pipeline is being scheduled.
#if 0
- HazardRecognizer::HazardType retval = NoHazard;
+ const SDNode *Node = SU->getNode()->getFlaggedMachineNode();
+ ScheduleHazardRecognizer::HazardType retval = NoHazard;
bool mustBeOdd = false;
switch (Node->getOpcode()) {
@@ -120,7 +123,7 @@
#endif
}
-void SPUHazardRecognizer::EmitInstruction(SDNode *Node)
+void SPUHazardRecognizer::EmitInstruction(SUnit *SU)
{
}
diff --git a/lib/Target/CellSPU/SPUHazardRecognizers.h b/lib/Target/CellSPU/SPUHazardRecognizers.h
index 6b73083..d0ae2d8 100644
--- a/lib/Target/CellSPU/SPUHazardRecognizers.h
+++ b/lib/Target/CellSPU/SPUHazardRecognizers.h
@@ -15,13 +15,14 @@
#ifndef SPUHAZRECS_H
#define SPUHAZRECS_H
-#include "llvm/CodeGen/ScheduleDAGSDNodes.h"
-#include "SPUInstrInfo.h"
+#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
namespace llvm {
+
+class TargetInstrInfo;
/// SPUHazardRecognizer
-class SPUHazardRecognizer : public HazardRecognizer
+class SPUHazardRecognizer : public ScheduleHazardRecognizer
{
private:
const TargetInstrInfo &TII;
@@ -29,8 +30,8 @@
public:
SPUHazardRecognizer(const TargetInstrInfo &TII);
- virtual HazardType getHazardType(SDNode *Node);
- virtual void EmitInstruction(SDNode *Node);
+ virtual HazardType getHazardType(SUnit *SU);
+ virtual void EmitInstruction(SUnit *SU);
virtual void AdvanceCycle();
virtual void EmitNoop();
};
@@ -38,4 +39,3 @@
} // end namespace llvm
#endif
-
diff --git a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
index 858802c..816502d 100644
--- a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
+++ b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
@@ -353,7 +353,7 @@
/// CreateTargetHazardRecognizer - Return the hazard recognizer to use for
/// this target when scheduling the DAG.
- virtual HazardRecognizer *CreateTargetHazardRecognizer() {
+ virtual ScheduleHazardRecognizer *CreateTargetHazardRecognizer() {
const TargetInstrInfo *II = TM.getInstrInfo();
assert(II && "No InstrInfo?");
return new SPUHazardRecognizer(*II);