Add several FIXME cases for ARM encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142377 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/MC/ARM/neont2-mul-accum-encoding.s b/test/MC/ARM/neont2-mul-accum-encoding.s
index 10dc90d..f3cc071 100644
--- a/test/MC/ARM/neont2-mul-accum-encoding.s
+++ b/test/MC/ARM/neont2-mul-accum-encoding.s
@@ -90,3 +90,8 @@
@ CHECK: vqdmlsl.s16 q8, d19, d18 @ encoding: [0xd3,0xef,0xa2,0x0b]
@ CHECK: vqdmlsl.s32 q8, d19, d18 @ encoding: [0xe3,0xef,0xa2,0x0b]
+
+@ vmla.i32 q12, q8, d3[0]
+@ FIXME: vmla.i32 q12, q8, d3[0] @ encoding: [0xe0,0xff,0xc3,0x80]
+@ vmlal.s32 q0, d5, d10[0]
+@ FIXME: vmlal.s32 q0, d5, d10[0] @ encoding: [0xa5,0xef,0x4a,0x02]
diff --git a/test/MC/ARM/neont2-mul-encoding.s b/test/MC/ARM/neont2-mul-encoding.s
index 93ecabb..98f7aa1 100644
--- a/test/MC/ARM/neont2-mul-encoding.s
+++ b/test/MC/ARM/neont2-mul-encoding.s
@@ -56,3 +56,12 @@
vqdmull.s16 q8, d16, d17
@ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0d]
vqdmull.s32 q8, d16, d17
+
+@ FIXME: vmla.i32 q12, q8, d3[0] @ encoding: [0xe0,0xff,0xc3,0x80]
+@ vmla.i32 q12, q8, d3[0]
+@ FIXME: vqdmulh.s16 d11, d2, d3[0] @ encoding: [0x92,0xef,0x43,0xbc]
+@ vqdmulh.s16 d11, d2, d3[0]
+@ FIXME: vmul.i16 d18, d8, d0[3] @ encoding: [0xd8,0xef,0x68,0x28]
+@ vmul.i16 d18, d8, d0[3]
+
+