commit dfebc4cc4c267f797e823b781d73586cc6fc49c5
author Bill Schmidt <wschmidt@linux.vnet.ibm.com> Thu Dec 13 18:45:54 2012 +0000
committer Bill Schmidt <wschmidt@linux.vnet.ibm.com> Thu Dec 13 18:45:54 2012 +0000
tree 61fefa1183e19c11bef174b68ebc499fb1d483e8
parent 860e7cdab9d5eceda5ac52ae0ddfb4bdab0067f2

This is just a clean-up patch that simplifies the initial-exec TLS logic by
avoiding use of machine operand flags.  No change in observable behavior, so
no new test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170141 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPC.h

diff --git a/lib/Target/PowerPC/PPC.h b/lib/Target/PowerPC/PPC.h
index bbd247f..e6d38eb 100644
--- a/lib/Target/PowerPC/PPC.h
+++ b/lib/Target/PowerPC/PPC.h
@@ -72,9 +72,7 @@
     MO_HA16 = 2 << 5,
 
     MO_TPREL16_HA = 3 << 5,
-    MO_TPREL16_LO = 4 << 5,
-    MO_GOT_TPREL16_DS = 5 << 5,
-    MO_TLS = 6 << 5
+    MO_TPREL16_LO = 4 << 5
   };
   } // end namespace PPCII
   

lib/Target/PowerPC/PPCISelLowering.cpp

diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 68f1bc6..0748bd5 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1351,15 +1351,11 @@
     llvm_unreachable("only local-exec is currently supported for ppc32");
 
   if (Model == TLSModel::InitialExec) {
-    SDValue GOTOffset = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
-                                                   PPCII::MO_GOT_TPREL16_DS);
-    SDValue TPReg = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
-                                               PPCII::MO_TLS);
-    SDValue GOTReg = DAG.getRegister(is64bit ? PPC::X2  : PPC::R2,
-                                     is64bit ? MVT::i64 : MVT::i32);
-    SDValue TPOffset = DAG.getNode(PPCISD::LD_GOT_TPREL, dl, PtrVT,
-                                   GOTOffset, GOTReg);
-    return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TPOffset, TPReg);
+    SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0);
+    SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64);
+    SDValue TPOffset = DAG.getNode(PPCISD::LD_GOT_TPREL, dl,
+                                   PtrVT, TGA, GOTReg);
+    return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TPOffset, TGA);
   }
 
   if (Model == TLSModel::GeneralDynamic) {

lib/Target/PowerPC/PPCInstr64Bit.td

diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td
index bc66d5c..429c60b 100644
--- a/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -384,7 +384,7 @@
 // ADD8 has a special form: reg = ADD8(reg, sym@tls) for use by the
 // initial-exec thread-local storage model.
 def ADD8TLS  : XOForm_1<31, 266, 0, (outs G8RC:$rT), (ins G8RC:$rA, tlsreg:$rB),
-                        "add $rT, $rA, $rB", IntSimple,
+                        "add $rT, $rA, $rB@tls", IntSimple,
                         [(set G8RC:$rT, (add G8RC:$rA, tglobaltlsaddr:$rB))]>;
                      
 let Defs = [CARRY] in {

lib/Target/PowerPC/PPCMCInstLower.cpp

diff --git a/lib/Target/PowerPC/PPCMCInstLower.cpp b/lib/Target/PowerPC/PPCMCInstLower.cpp
index 1c4af90..73f7a2c 100644
--- a/lib/Target/PowerPC/PPCMCInstLower.cpp
+++ b/lib/Target/PowerPC/PPCMCInstLower.cpp
@@ -114,12 +114,6 @@
                                break;
     case PPCII::MO_TPREL16_LO: RefKind = MCSymbolRefExpr::VK_PPC_TPREL16_LO;
                                break;
-    case PPCII::MO_GOT_TPREL16_DS:
-      RefKind = MCSymbolRefExpr::VK_PPC_GOT_TPREL16_DS;
-      break;
-    case PPCII::MO_TLS:
-      RefKind = MCSymbolRefExpr::VK_PPC_TLS;
-      break;
    }
 
   // FIXME: This isn't right, but we don't have a good way to express this in