Had expand logic backward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25105 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp
index 9ce9a3e..63a04e4 100644
--- a/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -103,6 +103,8 @@
// We don't have line number support yet.
setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
+ setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
// We want to legalize GlobalAddress and ConstantPool and
// ExternalSymbols nodes into the appropriate instructions to
diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp
index fb3b204..31dba92 100644
--- a/lib/Target/IA64/IA64ISelLowering.cpp
+++ b/lib/Target/IA64/IA64ISelLowering.cpp
@@ -74,6 +74,8 @@
// We don't have line number support yet.
setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
+ setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
//IA64 has these, but they are not implemented
setOperationAction(ISD::CTTZ , MVT::i64 , Expand);
diff --git a/lib/Target/IA64/IA64ISelPattern.cpp b/lib/Target/IA64/IA64ISelPattern.cpp
index 31e2259..f1de338 100644
--- a/lib/Target/IA64/IA64ISelPattern.cpp
+++ b/lib/Target/IA64/IA64ISelPattern.cpp
@@ -102,6 +102,8 @@
// We don't have line number support yet.
setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
+ setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
computeRegisterProperties();
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 8eb4ac3..9547b9e 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -96,8 +96,9 @@
// Support label based line numbers.
setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
// FIXME - use subtarget debug flags
- if (TM.getSubtarget<PPCSubtarget>().isDarwin())
+ if (!TM.getSubtarget<PPCSubtarget>().isDarwin())
setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
// We want to legalize GlobalAddress and ConstantPool nodes into the
diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index b80430d..d61c4f0 100644
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -153,6 +153,8 @@
// We don't have line number support yet.
setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
+ setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
computeRegisterProperties();
}
diff --git a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
index b80430d..d61c4f0 100644
--- a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
+++ b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
@@ -153,6 +153,8 @@
// We don't have line number support yet.
setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
+ setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
computeRegisterProperties();
}
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 304165e..c96049d 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -130,6 +130,8 @@
// We don't have line number support yet.
setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
+ setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
if (X86ScalarSSE) {
// Set up the FP register classes.