Fix x86-64 jit: remove reliance on Dwarf numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44048 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 90d361b..8102ce6 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -385,13 +385,20 @@
bool Emitter::isX86_64ExtendedReg(const MachineOperand &MO) {
if (!MO.isRegister()) return false;
unsigned RegNo = MO.getReg();
- int DWNum = II->getRegisterInfo().getDwarfRegNum(RegNo);
- if (DWNum >= II->getRegisterInfo().getDwarfRegNum(X86::R8) &&
- DWNum <= II->getRegisterInfo().getDwarfRegNum(X86::R15))
+ switch (MO.getReg()) {
+ default: break;
+ case X86::R8: case X86::R9: case X86::R10: case X86::R11:
+ case X86::R12: case X86::R13: case X86::R14: case X86::R15:
+ case X86::R8D: case X86::R9D: case X86::R10D: case X86::R11D:
+ case X86::R12D: case X86::R13D: case X86::R14D: case X86::R15D:
+ case X86::R8W: case X86::R9W: case X86::R10W: case X86::R11W:
+ case X86::R12W: case X86::R13W: case X86::R14W: case X86::R15W:
+ case X86::R8B: case X86::R9B: case X86::R10B: case X86::R11B:
+ case X86::R12B: case X86::R13B: case X86::R14B: case X86::R15B:
+ case X86::XMM8: case X86::XMM9: case X86::XMM10: case X86::XMM11:
+ case X86::XMM12: case X86::XMM13: case X86::XMM14: case X86::XMM15:
return true;
- if (DWNum >= II->getRegisterInfo().getDwarfRegNum(X86::XMM8) &&
- DWNum <= II->getRegisterInfo().getDwarfRegNum(X86::XMM15))
- return true;
+ }
return false;
}