- Expand tabs to spaces.
- select_bits.ll now fully functional now that PR1993 is closed. It was
  previously broken by refactoring in SPUInstrInfo.td and using multiclasses.
- Same for eqv.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47972 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/CellSPU/immed32.ll b/test/CodeGen/CellSPU/immed32.ll
index d269a45..2cadfff 100644
--- a/test/CodeGen/CellSPU/immed32.ll
+++ b/test/CodeGen/CellSPU/immed32.ll
@@ -16,57 +16,57 @@
 target triple = "spu"
 
 define i32 @test_1() {
-  ret i32 4784128		;; ILHU via pattern (0x49000)
+  ret i32 4784128               ;; ILHU via pattern (0x49000)
 }
 
 define i32 @test_2() {
-  ret i32 5308431		;; ILHU/IOHL via pattern (0x5100f)
+  ret i32 5308431               ;; ILHU/IOHL via pattern (0x5100f)
 }
 
 define i32 @test_3() {
-  ret i32 511			;; IL via pattern
+  ret i32 511                   ;; IL via pattern
 }
 
 define i32 @test_4() {
-  ret i32 -512			;; IL via pattern
+  ret i32 -512                  ;; IL via pattern
 }
 
 ;; double             float       floatval
 ;; 0x4005bf0a80000000 0x402d|f854 2.718282
 define float @float_const_1() {
-  ret float 0x4005BF0A80000000	;; ILHU/IOHL
+  ret float 0x4005BF0A80000000  ;; ILHU/IOHL
 }
 
 ;; double             float       floatval
 ;; 0x3810000000000000 0x0080|0000 0.000000
 define float @float_const_2() {
-  ret float 0x3810000000000000	;; IL 128
+  ret float 0x3810000000000000  ;; IL 128
 }
 
 ;; double             float       floatval
 ;; 0x47efffffe0000000 0x7f7f|ffff NaN
 define float @float_const_3() {
-  ret float 0x47EFFFFFE0000000	;; ILHU/IOHL via pattern
+  ret float 0x47EFFFFFE0000000  ;; ILHU/IOHL via pattern
 }
 
 ;; double             float       floatval
 ;; 0x400921fb60000000 0x4049|0fdb 3.141593
 define float @float_const_4() {
-  ret float 0x400921FB60000000	;; ILHU/IOHL via pattern
+  ret float 0x400921FB60000000  ;; ILHU/IOHL via pattern
 }
 
 ;; double             float       floatval
 ;; 0xbff6a09e60000000 0xbfb5|04f3 -1.414214
 define float @float_const_5() {
-  ret float 0xBFF6A09E60000000	;; ILHU/IOHL via pattern
+  ret float 0xBFF6A09E60000000  ;; ILHU/IOHL via pattern
 }
 
 ;; double             float       floatval
 ;; 0x3ff6a09e60000000 0x3fb5|04f3 1.414214
 define float @float_const_6() {
-  ret float 0x3FF6A09E60000000	;; ILHU/IOHL via pattern
+  ret float 0x3FF6A09E60000000  ;; ILHU/IOHL via pattern
 }
 
 define float @float_const_7() {
-  ret float 0.000000e+00	;; IL 0 via pattern
+  ret float 0.000000e+00        ;; IL 0 via pattern
 }