| commit | e303ac9052b9d03eff236469eb560e5b5da7fae2 | [log] [tgz] |
|---|---|---|
| author | Chris Lattner <sabre@nondot.org> | Fri Apr 06 17:47:14 2007 +0000 |
| committer | Chris Lattner <sabre@nondot.org> | Fri Apr 06 17:47:14 2007 +0000 |
| tree | dd6750530627999c852a698da849a21b68d0dd2b | |
| parent | 5a1ebb3c99eda9b2f18869e46d9b91eb2897ef07 [diff] [blame] |
minor comment fix git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35696 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index f824950..1947414 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -2840,7 +2840,7 @@ // Okay, this register is good, we can use it. ++NumAllocated; - // If we allocated enough consecutive + // If we allocated enough consecutive registers, succeed. if (NumAllocated == NumRegs) { unsigned RegStart = (i-NumAllocated)+1; unsigned RegEnd = i+1;