Compile:
int test3(int a, int b) { return (a < 0) ? a : 0; }
to:
_test3:
srawi r2, r3, 31
and r3, r2, r3
blr
instead of:
_test3:
cmpwi cr0, r3, 1
li r2, 0
blt cr0, LBB2_2 ;entry
LBB2_1: ;entry
mr r3, r2
LBB2_2: ;entry
blr
This implements: PowerPC/select_lt0.ll:seli32_a_a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30517 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index bcbac95..43028a8 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3168,7 +3168,6 @@
ISD::CondCode CC) {
MVT::ValueType VT = N2.getValueType();
- //ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.Val);
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val);
@@ -3204,9 +3203,11 @@
// Check to see if we can perform the "gzip trick", transforming
// select_cc setlt X, 0, A, 0 -> and (sra X, size(X)-1), A
- if (N1C && N1C->isNullValue() && N3C && N3C->isNullValue() &&
+ if (N1C && N3C && N3C->isNullValue() && CC == ISD::SETLT &&
MVT::isInteger(N0.getValueType()) &&
- MVT::isInteger(N2.getValueType()) && CC == ISD::SETLT) {
+ MVT::isInteger(N2.getValueType()) &&
+ (N1C->isNullValue() || // (a < 0) ? b : 0
+ (N1C->getValue() == 1 && N0 == N2))) { // (a < 1) ? a : 0
MVT::ValueType XType = N0.getValueType();
MVT::ValueType AType = N2.getValueType();
if (XType >= AType) {