commit e327e499138dac76c85076ba9494dab9500f81fa
author Misha Brukman <brukman+llvm@gmail.com> Thu Jun 24 23:53:24 2004 +0000
committer Misha Brukman <brukman+llvm@gmail.com> Thu Jun 24 23:53:24 2004 +0000
tree 9f6d49d1c219d6361b4864caa9932a6ab879a000
parent 7f484a5fff140ade284a1af34641da067bea11ae

Add a `break' in the switch/case statement between the int/fp sections.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14385 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPC32ISelSimple.cpp

diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp
index 34721ee..063001d 100644
--- a/lib/Target/PowerPC/PPC32ISelSimple.cpp
+++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp
@@ -1049,7 +1049,6 @@
 ///
 void ISel::visitReturnInst(ReturnInst &I) {
   Value *RetVal = I.getOperand(0);
-
   switch (getClassB(RetVal->getType())) {
   case cByte:   // integral return values: extend or move into r3 and return
   case cShort:
@@ -1303,6 +1302,7 @@
     case cInt:
       // Integral results are in r3
       BuildMI(BB, PPC32::OR, 2, Ret.Reg).addReg(PPC32::R3).addReg(PPC32::R3);
+      break;
     case cFP:     // Floating-point return values live in f1
       BuildMI(BB, PPC32::FMR, 1, Ret.Reg).addReg(PPC32::F1);
       break;