diff --git a/lib/Analysis/IPA/Andersens.cpp b/lib/Analysis/IPA/Andersens.cpp
index 1188693..fa9071b 100644
--- a/lib/Analysis/IPA/Andersens.cpp
+++ b/lib/Analysis/IPA/Andersens.cpp
@@ -260,9 +260,8 @@
 
       std::map<Value*, unsigned>::iterator I = ValueNodes.find(V);
       if (I == ValueNodes.end()) {
-        V->dump();
-        assert(I != ValueNodes.end() &&
-               "Value does not have a node in the points-to graph!");
+        DEBUG(V->dump());
+        assert(0 && "Value does not have a node in the points-to graph!");
       }
       return &GraphNodes[I->second];
     }
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index a798f55..6fe5249 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -540,7 +540,9 @@
       return Result.getValue(Op.ResNo);
     }
     // Otherwise this is an unhandled builtin node.  splat.
+#ifndef NDEBUG
     std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
+#endif
     assert(0 && "Do not know how to legalize this operator!");
     abort();
   case ISD::GlobalAddress:
@@ -2865,7 +2867,9 @@
   case ISD::CopyFromReg:
     assert(0 && "CopyFromReg must be legal!");
   default:
+#ifndef NDEBUG
     std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
+#endif
     assert(0 && "Do not know how to promote this operator!");
     abort();
   case ISD::UNDEF:
@@ -4205,7 +4209,9 @@
   case ISD::CopyFromReg:
     assert(0 && "CopyFromReg must be legal!");
   default:
+#ifndef NDEBUG
     std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
+#endif
     assert(0 && "Do not know how to expand this operator!");
     abort();
   case ISD::UNDEF:
@@ -4703,7 +4709,11 @@
   }
   
   switch (Node->getOpcode()) {
-  default: Node->dump(); assert(0 && "Unhandled operation in SplitVectorOp!");
+  default: 
+#ifndef NDEBUG
+    Node->dump();
+#endif
+    assert(0 && "Unhandled operation in SplitVectorOp!");
   case ISD::VBUILD_VECTOR: {
     std::vector<SDOperand> LoOps(Node->op_begin(), Node->op_begin()+NewNumElts);
     LoOps.push_back(NewNumEltsNode);
@@ -4820,7 +4830,9 @@
   SDOperand Result;
   switch (Node->getOpcode()) {
   default: 
+#ifndef NDEBUG
     Node->dump(); std::cerr << "\n";
+#endif
     assert(0 && "Unknown vector operation in PackVectorOp!");
   case ISD::VADD:
   case ISD::VSUB:
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 5d404f0..5282252 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -421,7 +421,7 @@
   } else {
     switch (Node->getOpcode()) {
     default:
-      Node->dump(); 
+      DEBUG(Node->dump()); 
       assert(0 && "This target-independent node should have been selected!");
     case ISD::EntryToken: // fall thru
     case ISD::TokenFactor:
diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
index 7443371..32d5222 100644
--- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
+++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
@@ -303,7 +303,7 @@
       bool rev = false;
       bool isNE = false;
       switch(CC) {
-      default: N->dump(); assert(0 && "Unknown FP comparison!");
+      default: DEBUG(N->dump()); assert(0 && "Unknown FP comparison!");
       case ISD::SETEQ: case ISD::SETOEQ: case ISD::SETUEQ: Opc = Alpha::CMPTEQ; break;
       case ISD::SETLT: case ISD::SETOLT: case ISD::SETULT: Opc = Alpha::CMPTLT; break;
       case ISD::SETLE: case ISD::SETOLE: case ISD::SETULE: Opc = Alpha::CMPTLE; break;
diff --git a/lib/Target/IA64/IA64ISelDAGToDAG.cpp b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
index 0552677..d004f0c 100644
--- a/lib/Target/IA64/IA64ISelDAGToDAG.cpp
+++ b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
@@ -511,7 +511,7 @@
       N->getValueType(0) : cast<VTSDNode>(N->getOperand(3))->getVT();
     unsigned Opc;
     switch (TypeBeingLoaded) {
-    default: N->dump(); assert(0 && "Cannot load this type!");
+    default: DEBUG(N->dump()); assert(0 && "Cannot load this type!");
     case MVT::i1: { // this is a bool
       Opc = IA64::LD1; // first we load a byte, then compare for != 0
       if(N->getValueType(0) == MVT::i1) { // XXX: early exit!
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp
index bc07722..f5ea746 100644
--- a/lib/Target/PowerPC/PPCCodeEmitter.cpp
+++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp
@@ -160,7 +160,7 @@
       Reloc = PPC::reloc_pcrel_bx;
     else {
       switch (MI.getOpcode()) {
-      default: MI.dump(); assert(0 && "Unknown instruction for relocation!");
+      default: DEBUG(MI.dump()); assert(0 && "Unknown instruction for relocation!");
       case PPC::LIS:
         Reloc = PPC::reloc_absolute_high;       // Pointer to symbol
         break;
diff --git a/utils/TableGen/DAGISelEmitter.cpp b/utils/TableGen/DAGISelEmitter.cpp
index bf9c27a..cef7acf 100644
--- a/utils/TableGen/DAGISelEmitter.cpp
+++ b/utils/TableGen/DAGISelEmitter.cpp
@@ -2136,7 +2136,7 @@
         if (DefInit *Pred = dynamic_cast<DefInit*>(Predicates->getElement(i))) {
           Record *Def = Pred->getDef();
           if (!Def->isSubClassOf("Predicate")) {
-            Def->dump();
+            DEBUG(Def->dump());
             assert(0 && "Unknown predicate type!");
           }
           if (!PredicateCheck.empty())
@@ -2344,7 +2344,7 @@
             emitCheck("cast<CondCodeSDNode>(" + RootName + utostr(OpNo) +
                       ")->get() == ISD::" + LeafRec->getName());
           } else {
-            Child->dump();
+            DEBUG(Child->dump());
             std::cerr << " ";
             assert(0 && "Unknown leaf type!");
           }
@@ -2357,7 +2357,7 @@
 
           emitCheck("CN" + utostr(CTmp) + " == " +itostr(II->getValue()));
         } else {
-          Child->dump();
+          DEBUG(Child->dump());
           assert(0 && "Unknown leaf type!");
         }
       }
@@ -2510,7 +2510,7 @@
         return std::make_pair(1, ResNo);
       }
     
-      N->dump();
+      DEBUG(N->dump());
       assert(0 && "Unknown leaf type!");
       return std::make_pair(1, ~0U);
     }