commit | e5b51ac7708402473f0a558f4aac74fab63d4f7e | [log] [tgz] |
---|---|---|
author | Evan Cheng <evan.cheng@apple.com> | Sat Apr 17 06:13:15 2010 +0000 |
committer | Evan Cheng <evan.cheng@apple.com> | Sat Apr 17 06:13:15 2010 +0000 |
tree | fc4b7c5802dbc3431de88c9ecf220d087478d748 | |
parent | 4ff28527bb8e5ed4ae4b65f0fa6967eb79a05d4c [diff] [blame] |
More work to allow dag combiner to promote 16-bit ops to 32-bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101621 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 9082fb6..4b7fb86 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -355,7 +355,7 @@ InWorklist.insert(I); } - TargetLowering::TargetLoweringOpt TLO(*CurDAG, true); + TargetLowering::TargetLoweringOpt TLO(*CurDAG, true, true, true); while (!Worklist.empty()) { SDNode *N = Worklist.pop_back_val(); InWorklist.erase(N);