Fix llvm-gcc build for armv6t2 and later architectures. The hasV6T2Ops
predicate does not check if Thumb mode is enabled, and when in ARM mode
there are still some checks for constant-pool use that need to run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73887 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 1ed9e80..d3c3047 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -579,17 +579,18 @@
switch (N->getOpcode()) {
default: break;
case ISD::Constant: {
- // ARMv6T2 and later should materialize imms via MOV / MOVT pair.
- if (Subtarget->hasV6T2Ops() || Subtarget->hasThumb2())
- break;
-
unsigned Val = cast<ConstantSDNode>(N)->getZExtValue();
bool UseCP = true;
- if (Subtarget->isThumb())
- UseCP = (Val > 255 && // MOV
- ~Val > 255 && // MOV + MVN
- !ARM_AM::isThumbImmShiftedVal(Val)); // MOV + LSL
- else
+ if (Subtarget->isThumb()) {
+ if (Subtarget->hasThumb2())
+ // Thumb2 has the MOVT instruction, so all immediates can
+ // be done with MOV + MOVT, at worst.
+ UseCP = 0;
+ else
+ UseCP = (Val > 255 && // MOV
+ ~Val > 255 && // MOV + MVN
+ !ARM_AM::isThumbImmShiftedVal(Val)); // MOV + LSL
+ } else
UseCP = (ARM_AM::getSOImmVal(Val) == -1 && // MOV
ARM_AM::getSOImmVal(~Val) == -1 && // MVN
!ARM_AM::isSOImmTwoPartVal(Val)); // two instrs.