commit e6d088acc90e422451e098555d383d4d65b6ce6b
author Bill Wendling <isanbard@gmail.com> Tue Feb 26 21:47:57 2008 +0000
committer Bill Wendling <isanbard@gmail.com> Tue Feb 26 21:47:57 2008 +0000
tree 7b96c43f8dac3ea29c64a51a05d62cc6d564175f
parent 95e78348f08fab152b2b03c516cc9f22ed60b8de

Rename PrintableName to Name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47629 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/VirtRegMap.cpp

diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index 93a584b..fe81fdd 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -141,7 +141,7 @@
   for (unsigned i = TargetRegisterInfo::FirstVirtualRegister,
          e = MF.getRegInfo().getLastVirtReg(); i <= e; ++i) {
     if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
-      OS << "[reg" << i << " -> " << TRI->getPrintableName(Virt2PhysMap[i])
+      OS << "[reg" << i << " -> " << TRI->getName(Virt2PhysMap[i])
          << "]\n";
   }
 
@@ -351,7 +351,7 @@
       DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1;
     else
       DOUT << "Remembering SS#" << SlotOrReMat;
-    DOUT << " in physreg " << TRI->getPrintableName(Reg) << "\n";
+    DOUT << " in physreg " << TRI->getName(Reg) << "\n";
   }
 
   /// canClobberPhysReg - Return true if the spiller is allowed to change the 
@@ -392,7 +392,7 @@
     assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
            "Bidirectional map mismatch!");
     SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1;
-    DOUT << "PhysReg " << TRI->getPrintableName(PhysReg)
+    DOUT << "PhysReg " << TRI->getName(PhysReg)
          << " copied, it is available for use but can no longer be modified\n";
   }
 }
@@ -417,7 +417,7 @@
     assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
            "Bidirectional map mismatch!");
     SpillSlotsOrReMatsAvailable.erase(SlotOrReMat);
-    DOUT << "PhysReg " << TRI->getPrintableName(PhysReg)
+    DOUT << "PhysReg " << TRI->getName(PhysReg)
          << " clobbered, invalidating ";
     if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
       DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << "\n";
@@ -1135,9 +1135,9 @@
           else
             DOUT << "Reusing SS#" << ReuseSlot;
           DOUT << " from physreg "
-               << TRI->getPrintableName(PhysReg) << " for vreg"
+               << TRI->getName(PhysReg) << " for vreg"
                << VirtReg <<" instead of reloading into physreg "
-               << TRI->getPrintableName(VRM.getPhys(VirtReg)) << "\n";
+               << TRI->getName(VRM.getPhys(VirtReg)) << "\n";
           unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
           MI.getOperand(i).setReg(RReg);
 
@@ -1208,7 +1208,7 @@
             DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1;
           else
             DOUT << "Reusing SS#" << ReuseSlot;
-          DOUT << " from physreg " << TRI->getPrintableName(PhysReg)
+          DOUT << " from physreg " << TRI->getName(PhysReg)
 	       << " for vreg" << VirtReg
                << " instead of reloading into same physreg.\n";
           unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;