diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index 7eaa3e4..ffe8259 100644
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -326,6 +326,25 @@
 };
 }
 
+//These describe LDAx
+static const int64_t IMM_LOW  = 0xffffffffffff8000LL;
+static const int IMM_HIGH = 0x0000000000007fffLL;
+static const int IMM_MULT = 65536;
+
+static long getUpper16(long l)
+{
+  long y = l / IMM_MULT;
+  if (l % IMM_MULT > IMM_HIGH)
+    ++y;
+  return y;
+}
+
+static long getLower16(long l)
+{
+  long h = getUpper16(l);
+  return l - h * IMM_MULT;
+}
+
 static unsigned GetSymVersion(unsigned opcode)
 {
   switch (opcode) {
@@ -1447,9 +1466,16 @@
 
   case ISD::Constant:
     {
-      unsigned long val = cast<ConstantSDNode>(N)->getValue();
-      if (val < 32000 && (long)val > -32000)
-        BuildMI(BB, Alpha::LOAD_IMM, 1, Result).addImm((long)val);
+      int64_t val = (long)cast<ConstantSDNode>(N)->getValue();
+      if (val <= IMM_HIGH && val >= IMM_LOW) {
+	BuildMI(BB, Alpha::LDA, 2, Result).addImm(val).addReg(Alpha::R31);
+      }
+      else if (val <= (int64_t)IMM_HIGH + (int64_t)IMM_HIGH * (int64_t)IMM_MULT &&
+	       val >= (int64_t)IMM_LOW + (int64_t)IMM_LOW * (int64_t)IMM_MULT) {
+	Tmp1 = MakeReg(MVT::i64);
+	BuildMI(BB, Alpha::LDAH, 2, Tmp1).addImm(getUpper16(val)).addReg(Alpha::R31);
+	BuildMI(BB, Alpha::LDA, 2, Result).addImm(getLower16(val)).addReg(Tmp1);
+      }
       else {
         MachineConstantPool *CP = BB->getParent()->getConstantPool();
         ConstantUInt *C = ConstantUInt::get(Type::getPrimitiveType(Type::ULongTyID) , val);
diff --git a/lib/Target/Alpha/AlphaInstrInfo.td b/lib/Target/Alpha/AlphaInstrInfo.td
index 8e7758c..49e2a3e 100644
--- a/lib/Target/Alpha/AlphaInstrInfo.td
+++ b/lib/Target/Alpha/AlphaInstrInfo.td
@@ -53,9 +53,6 @@
 let isReturn = 1, isTerminator = 1 in
   def RETURN : PseudoInstAlpha<(ops ), "ret $$31,($$26),1">; //Return from subroutine
 
-let Uses = [R29], Defs = [R28] in
-  def LOAD_IMM : PseudoInstAlpha<(ops GPRC:$RC, s64imm:$IMM), "ldiq $RC,$IMM">; //Load Immediate Quadword
-
 let Uses = [R29], Defs = [R28] in {
   def LOAD_ADDR : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "lda $RA,$DISP">;  //Load address
   def LDQ_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "ldq $RA,$DISP">; //Load quadword