Move FastISel's HandlePHINodesInSuccessorBlocks call down into FastISel
itself too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102176 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/include/llvm/CodeGen/FastISel.h b/include/llvm/CodeGen/FastISel.h
index 8c8698c..2eb2df2 100644
--- a/include/llvm/CodeGen/FastISel.h
+++ b/include/llvm/CodeGen/FastISel.h
@@ -107,14 +107,6 @@
   /// index value.
   unsigned getRegForGEPIndex(const Value *V);
 
-  /// HandlePHINodesInSuccessorBlocks - Handle PHI nodes in successor blocks.
-  /// Emit code to ensure constants are copied into registers when needed.
-  /// Remember the virtual registers that need to be added to the Machine PHI
-  /// nodes as input.  We cannot just directly add them, because expansion
-  /// might result in multiple MBB's for one BB.  As such, the start of the
-  /// BB might correspond to a different MBB than the end.
-  bool HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
-
   virtual ~FastISel();
 
 protected:
@@ -311,6 +303,14 @@
   bool SelectBitCast(const User *I);
   
   bool SelectCast(const User *I, unsigned Opcode);
+
+  /// HandlePHINodesInSuccessorBlocks - Handle PHI nodes in successor blocks.
+  /// Emit code to ensure constants are copied into registers when needed.
+  /// Remember the virtual registers that need to be added to the Machine PHI
+  /// nodes as input.  We cannot just directly add them, because expansion
+  /// might result in multiple MBB's for one BB.  As such, the start of the
+  /// BB might correspond to a different MBB than the end.
+  bool HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
 };
 
 }
diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp
index 132c42e..c40eaf6 100644
--- a/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -553,6 +553,12 @@
 
 bool
 FastISel::SelectInstruction(const Instruction *I) {
+  // Just before the terminator instruction, insert instructions to
+  // feed PHI nodes in successor blocks.
+  if (isa<TerminatorInst>(I))
+    if (!HandlePHINodesInSuccessorBlocks(I->getParent()))
+      return false;
+
   DL = I->getDebugLoc();
 
   // First, try doing target-independent selection.
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 875672e..2cdd1cc 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -751,20 +751,6 @@
       FastIS->startNewBlock(BB);
       // Do FastISel on as many instructions as possible.
       for (; BI != End; ++BI) {
-        // Just before the terminator instruction, insert instructions to
-        // feed PHI nodes in successor blocks.
-        if (isa<TerminatorInst>(BI))
-          if (!FastIS->HandlePHINodesInSuccessorBlocks(LLVMBB)) {
-            ++NumFastIselFailures;
-            if (EnableFastISelVerbose || EnableFastISelAbort) {
-              dbgs() << "FastISel miss: ";
-              BI->dump();
-            }
-            assert(!EnableFastISelAbort &&
-                   "FastISel didn't handle a PHI in a successor");
-            break;
-          }
-
         // Try to select the instruction with FastISel.
         if (FastIS->SelectInstruction(BI))
           continue;