Compute the value types that are natively supported by a target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23282 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h
index e453113..6a9b790 100644
--- a/utils/TableGen/CodeGenRegisters.h
+++ b/utils/TableGen/CodeGenRegisters.h
@@ -17,6 +17,7 @@
 
 #include <string>
 #include <vector>
+#include "llvm/CodeGen/ValueTypes.h"
 
 namespace llvm {
   class Record;
@@ -36,6 +37,7 @@
     std::vector<Record*> Elements;
     unsigned SpillSize;
     unsigned SpillAlignment;
+    MVT::ValueType VT;
     std::string MethodProtos, MethodBodies;
 
     const std::string &getName() const;
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index bd02ccd..61e237f 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -152,6 +152,7 @@
   Namespace = R->getValueAsString("Namespace");
   SpillSize = R->getValueAsInt("Size");
   SpillAlignment = R->getValueAsInt("Alignment");
+  VT = getValueType(R->getValueAsDef("RegType"));
 
   if (CodeInit *CI = dynamic_cast<CodeInit*>(R->getValueInit("MethodBodies")))
     MethodBodies = CI->getValue();
@@ -182,6 +183,11 @@
   return TheDef->getName();
 }
 
+void CodeGenTarget::ReadLegalValueTypes() const {
+  const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
+  for (unsigned i = 0, e = RCs.size(); i != e; ++i)
+    LegalValueTypes.push_back(RCs[i].VT);
+}
 
 
 void CodeGenTarget::ReadInstructions() const {
diff --git a/utils/TableGen/CodeGenTarget.h b/utils/TableGen/CodeGenTarget.h
index 05d5cb2..1748e8c 100644
--- a/utils/TableGen/CodeGenTarget.h
+++ b/utils/TableGen/CodeGenTarget.h
@@ -47,9 +47,11 @@
   mutable std::map<std::string, CodeGenInstruction> Instructions;
   mutable std::vector<CodeGenRegister> Registers;
   mutable std::vector<CodeGenRegisterClass> RegisterClasses;
+  mutable std::vector<MVT::ValueType> LegalValueTypes;
   void ReadRegisters() const;
   void ReadRegisterClasses() const;
   void ReadInstructions() const;
+  void ReadLegalValueTypes() const;
 public:
   CodeGenTarget();
 
@@ -70,16 +72,29 @@
   ///
   Record *getAsmWriter() const;
 
-  const std::vector<CodeGenRegister> &getRegisters() {
+  const std::vector<CodeGenRegister> &getRegisters() const {
     if (Registers.empty()) ReadRegisters();
     return Registers;
   }
 
-  const std::vector<CodeGenRegisterClass> getRegisterClasses() {
+  const std::vector<CodeGenRegisterClass> &getRegisterClasses() const {
     if (RegisterClasses.empty()) ReadRegisterClasses();
     return RegisterClasses;
   }
 
+  const std::vector<MVT::ValueType> &getLegalValueTypes() const {
+    if (LegalValueTypes.empty()) ReadLegalValueTypes();
+    return LegalValueTypes;
+  }
+  
+  /// isLegalValueType - Return true if the specified value type is natively
+  /// supported by the target (i.e. there are registers that directly hold it).
+  bool isLegalValueType(MVT::ValueType VT) const {
+    const std::vector<MVT::ValueType> &LegalVTs = getLegalValueTypes();
+    for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
+      if (LegalVTs[i] == VT) return true;
+    return false;    
+  }
 
   /// getInstructions - Return all of the instructions defined for this target.
   ///