fix a bunch of 80-col violations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55588 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 24144c6..d0dc5b0 100644
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -294,7 +294,8 @@
BuildMI(FirstMBB, MBBI, TII.get(PPC::MFLR8), GlobalBaseReg);
}
}
- return CurDAG->getRegister(GlobalBaseReg, PPCLowering.getPointerTy()).getNode();
+ return CurDAG->getRegister(GlobalBaseReg,
+ PPCLowering.getPointerTy()).getNode();
}
/// isIntS16Immediate - This method tests to see if the node is either a 32-bit
@@ -348,7 +349,8 @@
// opcode and that it has a immediate integer right operand.
// If so Imm will receive the 32 bit value.
static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) {
- return N->getOpcode() == Opc && isInt32Immediate(N->getOperand(1).getNode(), Imm);
+ return N->getOpcode() == Opc
+ && isInt32Immediate(N->getOperand(1).getNode(), Imm);
}
bool PPCDAGToDAGISel::isRunOfOnes(unsigned Val, unsigned &MB, unsigned &ME) {